Hitachi SH7750 series Hardware Manual page 285

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Bit 25—Control Input Pin Pull-Up Resistor Control (IPUP): Specifies the pull-up resistor
status for control input pins (NMI, ,5/3–,5/6, %5(4, MD6/,2,649, 5'<). IPUP is initialized
by a power-on reset.
Bit 25: IPUP
0
1
Bit 24—Control Output Pin Pull-Up Resistor Control (OPUP): Specifies the pull-up resistor
status for control output pins (A[25:0], %6, &6Q, 5', :(Q, RD/:5, 5$6, 5$65, &(5$, &(5%,
5'5, RD/:55) when high-impedance. OPUP is initialized by a power-on reset.
Bit 24: OPUP
0
1
Bit 21—Area 1 SRAM Byte Control Mode (A1MBC): MPX interface has priority when an
MPX interface is set. This bit is initialized by a power-on reset.
Bit 21: A1MBC
0
1
Bit 20—Area 4 SRAM Byte Control Mode (A4MBC): MPX interface has priority when an
MPX interface is set. This bit is initialized by a power-on reset.
Bit 20: A4MBC
0
1
Rev. 4.0, 04/00, page 274 of 850
Description
Pull-up resistor is on for control input pins (NMI, ,5/3–,5/6, %5(4,
MD6/,2,649, 5'<)
Pull-up resistor is off for control input pins (NMI, ,5/3–,5/6, %5(4,
MD6/,2,649, 5'<)
Description
Pull-up resistor is on for control output pins (A[25:0], %6, &6Q, 5', :(Q,
RD/:5, 5$6, 5$65, &(5$, &(5%, 5'5, RD/:55)
Pull-up resistor is off for control output pins (A[25:0], %6, &6Q, 5', :(Q,
RD/:5, 5$6, 5$65, &(5$, &(5%, 5'5, RD/:55)
Description
Area 1 SRAM is set to normal mode
Area 1 SRAM is set to byte control mode
Description
Area 4 SRAM is set to normal mode
Area 4 SRAM is set to byte control mode
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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