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12.2.3
Timer Constant Registers (TCOR)
The TCOR registers are 32-bit readable/writable registers. There are three TCOR registers, one for
each channel.
When a TCNT counter underflows while counting down, the TCOR value is set in that TCNT,
which continues counting down from the set value.
The TCOR registers are initialized to H'FFFFFFFF by a power-on or manual reset, but are not
initialized and retain their contents in standby mode.
Bit:
Initial value:
R/W:
12.2.4
Timer Counters (TCNT)
The TCNT registers are 32-bit readable/writable registers. There are three TCNT registers, one for
each channel.
Each TCNT counts down on the input clock selected by TPSC2–TPSC0 in the timer control
register (TCR).
When a TCNT counter underflows while counting down, the underflow flag (UNF) is set in the
corresponding timer control register (TCR). At the same time, the timer constant register (TCOR)
value is set in TCNT, and the count-down operation continues from the set value.
As the TCNT registers are serially modified 32-bit registers and the internal peripheral module bus
is 16 bits wide, there is a time difference when reading the upper 16 bits and lower 16 bits of
TCNT. To prevent counter read value drift due to this time difference, a synchronization circuit is
provided. When the upper 16 bits are read, the lower 16 bits are simultaneously stored in a buffer
register. After the upper 16 bits are read, the lower 16 bits are read from the buffer register.
The TCNT registers are initialized to H'FFFFFFFF by a power-on or manual reset, but are not
initialized and retain their contents in standby mode.
Bit:
Initial value:
R/W:
Rev. 4.0, 04/00, page 246 of 850
31
30
1
1
R/W
R/W
31
30
1
1
R/W
R/W
29
· · · · · · · · · · · · ·
1
R/W
29
· · · · · · · · · · · · ·
1
R/W
2
1
1
1
R/W
R/W
2
1
1
1
R/W
R/W
0
1
R/W
0
1
R/W
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