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Bits 2 to 0—Timer Prescaler 2 to 0 (TPSC2–TPSC0): These bits select the TCNT count clock.
When the on-chip RTC output clock is selected as the count clock for a channel, that channel can
operate even in module standby mode. When another clock is selected, the channel does not
operate in standby mode.
Bit 2: TPSC2
Bit 1: TPSC1
0
0
1
1
0
1
12.2.6
Input Capture Register (TCPR2)
TCPR2 is a 32-bit read-only register for use with the input capture function, provided only in
channel 2.
The input capture function is controlled by means of the input capture control bits (ICPE1, ICPE0)
and clock edge bits (CKEG1, CKEG0) in TCR2. When input capture occurs, the TCNT2 value is
copied into TCPR2. The value is set in TCPR2 only when the ICPF bit in TCR2 is 0.
TCPR2 is not initialized by a power-on or manual reset, or in standby mode.
Bit:
Initial value:
R/W:
Rev. 4.0, 04/00, page 250 of 850
Bit 0: TPSC0
0
1
0
1
0
1
0
1
31
30
R
R
Description
Counts on Pφ/4
Counts on Pφ/16
Counts on Pφ/64
Counts on Pφ/256
Counts on Pφ/1024
Reserved (Do not set)
Counts on on-chip RTC output clock
Counts on external clock
29
· · · · · · · · · · · · ·
Undefined
R
(Initial value)
2
1
R
R
0
R
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