Table of Contents
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Revision History
Code No.
Page
413699401
All
413699403
All
P1-1, 1-3,
4-1, 21-1 to
6, 21-18,
23-2
P1-2
P1-3 to 7,
24-1 to 4
P1-9 to 10
P2-16,
AP-A-1
P5-1
P7-23
P7-33
P10-2
P21-8, 21-20 Added a gapless play option
P21-21
P21-28,
PAP-A-52
P23-2
New establishment
Appended "D51" to the model names (S1C31D50/D51)
Added descriptions of the S1C31D51, and modified the figures/tables
Differences between S1C31D50 and S1C31D51
• General-purpose RAM size and Voice RAM size
• Sound output (S1C31D51 supports sound output using T16B.)
Corrected Table 1.1.1
R/F converter (RFC) - Supported sensors: "AC-bias resistive sensors" was deleted.
Modified the package names
Added JEITA package names
Modified Table 1.3.2.1
The I/O and initial state of the SDACOUT_P (P50) and SDACOUT_N (P51) pins were corrected.
Modified the CLG System Clock Control Register table
The CLGSCLK.CLKDIV[1:0] bit initial value was corrected.
Modified Table 5.2.1
The port numbers described in the port interrupts were corrected.
Modified Table 7.7.5.2
The VREFA0 pin function was added to P40.
Modified Table 7.7.9.2
P85: T16B Ch.1 EXCL01 → T16B Ch.0 EXCL01
Corrected the formula for calculating the frequency tolerance correction value
Modified Table 21.6.5
The volume level settings were corrected.
Corrected the SDAC Data Register
DAT[9:0]: Bit 9–1 → 9–0
Modified the sample external components table
X'tal3: CA301 (4MHz) → FA-238V (16 MHz)
Contents
REVISION HISTORY
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