Table of Contents
Advertisement
CONTENTS
Preface ......................................................................................................................................i
Notational conventions and symbols in this manual ................................................................i
1 Overview ........................................................................................................................1-1
1.1 Features .......................................................................................................................... 1-1
1.2 Block Diagram ................................................................................................................. 1-3
1.3 Pins ................................................................................................................................. 1-4
1.3.1 Pin Configuration Diagram ..................................................................................... 1-4
1.3.2 Pin Descriptions ..................................................................................................... 1-8
2 Power Supply, Reset, and Clocks ...............................................................................2-1
2.1 Power Generator (PWGA) ............................................................................................... 2-1
2.1.1 Overview ................................................................................................................. 2-1
2.1.2 Pins ......................................................................................................................... 2-1
Regulator Operation Mode .............................................................................. 2-2
Regulator Voltage Mode .................................................................................. 2-2
2.2 System Reset Controller (SRC) ....................................................................................... 2-3
2.2.1 Overview ................................................................................................................. 2-3
2.2.2 Input Pin ................................................................................................................. 2-4
2.2.3 Reset Sources ........................................................................................................ 2-4
2.2.4 Initialization Conditions (Reset Groups) ................................................................. 2-5
2.3 Clock Generator (CLG) .................................................................................................... 2-5
2.3.1 Overview ................................................................................................................. 2-5
2.3.2 Input/Output Pins ................................................................................................... 2-6
2.3.3 Clock Sources ........................................................................................................ 2-6
2.3.4 Operations .............................................................................................................. 2-9
2.4 Operating Mode ............................................................................................................. 2-13
2.4.1 Initial Boot Sequence ............................................................................................ 2-13
2.4.2 Transition between Operating Modes ................................................................... 2-13
2.5 Interrupts ........................................................................................................................ 2-15
2.6 Control Registers ........................................................................................................... 2-15
PWGA Control Register ........................................................................................................ 2-15
CLG System Clock Control Register .................................................................................... 2-16
CLG Oscillation Control Register ......................................................................................... 2-17
CLG IOSC Control Register .................................................................................................. 2-18
CLG OSC1 Control Register ................................................................................................. 2-18
CLG OSC3 Control Register ................................................................................................. 2-19
CLG Interrupt Flag Register.................................................................................................. 2-21
CLG Interrupt Enable Register ............................................................................................. 2-21
CLG FOUT Control Register ................................................................................................. 2-22
3 CPU and Debugger ......................................................................................................3-1
3.1 Overview ......................................................................................................................... 3-1
3.2 CPU Core ........................................................................................................................ 3-1
3.3 Debugger ........................................................................................................................ 3-1
3.3.1 List of Debugger Input/Output Pins ....................................................................... 3-1
3.3.2 External Connection ............................................................................................... 3-1
4 Memory and Bus ..........................................................................................................4-1
4.1 Overview ......................................................................................................................... 4-1
4.2 Bus Access Cycle ........................................................................................................... 4-2
4.3 Flash Memory ................................................................................................................. 4-2
ii
- Contents -
Seiko Epson Corporation
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
Advertisement
Table of Contents
