Rtca Hour/Minute Register - Epson S1C31D50 Technical Manual

Cmos 32-bit single chip
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10 REAL-TIME CLOCK (RTCA)
Bit 7
RTC1HZ
Bit 6
RTC2HZ
Bit 5
RTC4HZ
Bit 4
RTC8HZ
Bit 3
RTC16HZ
Bit 2
RTC32HZ
Bit 1
RTC64HZ
Bit 0
RTC128HZ
1 Hz counter data can be read from these bits.
The following shows the correspondence between the bit and frequency:
RTCASEC.RTC1HZ bit:
RTCASEC.RTC2HZ bit:
RTCASEC.RTC4HZ bit:
RTCASEC.RTC8HZ bit:
RTCASEC.RTC16HZ bit:
RTCASEC.RTC32HZ bit:
RTCASEC.RTC64HZ bit:
RTCASEC.RTC128HZ bit: 128 Hz
Note: The counter value may not be read correctly while the 1 Hz counter is running. These bits
must be read twice and assume the counter value was read successfully if the two read re-
sults are the same.

RTCA Hour/Minute Register

Register name
Bit
RTCAHUR
15
14
13–12 RTCHH[1:0]
11–8 RTCHL[3:0]
7
6–4 RTCMIH[2:0]
3–0 RTCMIL[3:0]
Bit 15
Reserved
Bit 14
RTCAP
This bit is used to set and read A.M. or P.M. data in 12H mode (RTCACTLL.RTC24H bit = 0).
1 (R/W): P.M.
0 (R/W): A.M.
In 24H mode (RTCACTLL.RTC24H bit = 1), this bit is fixed at 0 and writing 1 is ignored. However,
if the RTCAHUR.RTCAP bit = 1 when changed to 24H mode, it goes 0 at the next count-up timing of
the hour counter.
Bits 13–12 RTCHH[1:0]
Bits 11–8 RTCHL[3:0]
The RTCAHUR.RTCHH[1:0] bits and the RTCAHUR.RTCHL[3:0] bits are used to set and read the
10-hour digit and the 1-hour digit of the hour counter, respectively. The setting/read values are a BCD
code within the range from 1 to 12 in 12H mode or 0 to 23 in 24H mode.
Note: Be sure to avoid writing to the RTCAHUR.RTCHH[1:0]/RTCHL[3:0] bits while the RTCACTLL.
RTCBSY bit = 1.
Bit 7
Reserved
10-10
1 Hz
2 Hz
4 Hz
8 Hz
16 Hz
32 Hz
64 Hz
Bit name
Initial
0
RTCAP
0
0x1
0x2
0
0x0
0x0
Seiko Epson Corporation
Reset
R/W
R
H0
R/W
H0
R/W
H0
R/W
R
H0
R/W
H0
R/W
S1C31D50/D51 TECHNICAL MANUAL
Remarks
(Rev. 2.00)

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