Cr Oscillation Frequency Monitoring Function; Interrupts - Epson S1C31D50 Technical Manual

Cmos 32-bit single chip
Hide thumbs Also See for S1C31D50:
Table of Contents

Advertisement

External part tolerances
Power supply voltage fluctuations
Parasitic capacitance and resistance of the board
Temperature
Unevenness of IC quality

20.4.5 CR Oscillation Frequency Monitoring Function

The CR oscillation clock (RFCLK) generated during converting operation can be output from the RFCLKOn pin
for monitoring. By setting the RFC_nCTL.CONEN bit to 1, the RFC Ch.n enters continuous oscillation mode that
disables oscillation stop conditions to continue oscillating operations. In this case, set the the RFC_nTRG.SREF bit
(reference oscillation), the RFC_nTRG.SSENA bit (sensor A oscillation), or the RFC_nTRG.SSENB bit (sensor B
oscillation) to 1 to start oscillation. Set the bit to 0 to stop oscillation. Using this function helps easily measure the
CR oscillation clock frequency. Furthermore, setting the RFC_nCTL.RFCLKMD bit to 1 changes the output clock
to the divided-by-two RFCLK clock.
RFC_nCTL.CONEN
RFC_nTRG.SSENA, SSENB, SREF
(RFC_nCTL.RFCLKMD = 0)
(RFC_nCTL.RFCLKMD = 1)

20.5 Interrupts

The RFC has a function to generate the interrupts shown in Table 20.5.1.
Interrupt
Reference oscillation
RFC_nINTF.EREFIF
completion
Sensor A oscillation
RFC_nINTF.ESENAIF When sensor A oscillation has been completed normally
completion
Sensor B oscillation
RFC_nINTF.ESENBIF When sensor B oscillation has been completed normally
completion
Measurement counter
RFC_nINTF.OVMCIF When sensor oscillation has been terminated abnormally
overflow error
Time base counter
RFC_nINTF.OVTCIF
overflow error
The RFC provides interrupt enable bits corresponding to each interrupt flag. An interrupt request is sent to the CPU
core only when the interrupt flag, of which interrupt has been enabled by the interrupt enable bit, is set. For more
information on interrupt control, refer to the "Interrupt" chapter.
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
Table 20.4.4.1 Error Factors
Error factor
RFINn pin
RFCLKOn pin
RFCLKOn pin
Figure 20.4.5.1 CR Oscillation Clock (RFCLK) Waveform
Table 20.5.1 RFC Interrupt Function
Interrupt flag
When reference oscillation has been completed normally
due to a measurement counter overflow
due to the time base counter reaching 0x000000
due to the time base counter reaching 0x000000
due to a measurement counter overflow
When reference oscillation has been terminated abnor-
mally due to a time base counter overflow
Seiko Epson Corporation
Influence
Large
Large
Middle
Small
Small
Writing 1
Set condition
20 R/F CONVERTER (RFC)
Writing 0
V
DD
V
SS
V
DD
V
SS
Clear
condition
Writing 1
Writing 1
Writing 1
Writing 1
Writing 1
20-7

Advertisement

Table of Contents
loading

This manual is also suitable for:

S1c31d51

Table of Contents