Epson S1C31D50 Technical Manual page 414

APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
0x0020 0780–0x0020 078c
Address Register name
0x0020 T16_7CLK
0780 (T16 Ch.7 Clock
Control Register)
0x0020 T16_7MOD
0782 (T16 Ch.7 Mode
Register)
0x0020 T16_7CTL
0784
(T16 Ch.7 Control
Register)
0x0020 T16_7TR
0786
(T16 Ch.7 Reload
Data Register)
0x0020 T16_7TC
0788 (T16 Ch.7 Counter
Data Register)
0x0020 T16_7INTF
078a
(T16 Ch.7 Interrupt
Flag Register)
0x0020 T16_7INTE
078c (T16 Ch.7 Interrupt
Enable Register)
0x0020 07a0–0x0020 07bc
Address Register name
0x0020 ADC12A_0CTL
07a2 (ADC12A Ch.0
Control Register)
0x0020 ADC12A_0TRG
07a4
(ADC12A Ch.0
Trigger/Analog Input
Select Register)
0x0020 ADC12A_0CFG
07a6 (ADC12A Ch.0 Con-
figuration Register)
0x0020 ADC12A_0INTF
07a8
(ADC12A Ch.0
Interrupt Flag
Register)
AP-A-50
Bit Bit name
15–9 –
8 DBRUN
7–4 CLKDIV[3:0]
3–2 –
1–0 CLKSRC[1:0]
15–8 –
7–1 –
0 TRMD
15–9 –
8 PRUN
7–2 –
1 PRESET
0 MODEN
15–0 TR[15:0]
15–0 TC[15:0]
15–8 –
7–1 –
0 UFIF
15–8 –
7–1 –
0 UFIE
Bit Bit name
15 –
14–12 ADSTAT[2:0]
11 –
10 BSYSTAT
9–8 –
7–2 –
1 ADST
0 MODEN
15–14 –
13–11 ENDAIN[2:0]
10–8 STAAIN[2:0]
7 STMD
6 CNVMD
5–4 CNVTRG[1:0]
3 –
2–0 SMPCLK[2:0]
15–8 –
7–2 –
1–0 VRANGE[1:0]
15–9 –
8 OVIF
7 AD7CIF
6 AD6CIF
5 AD5CIF
4 AD4CIF
3 AD3CIF
2 AD2CIF
1 AD1CIF
0 AD0CIF
Seiko Epson Corporation
16-bit Timer (T16) Ch.7
Initial Reset R/W
0x00 – R
0 H0 R/W
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0 H0 R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0xffff H0 R/W
0xffff H0 R
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
12-bit A/D Converter (ADC12A) Ch.0
Initial Reset R/W
0 – R
0x0 H0 R
0 – R
0 H0 R
0x0 – R
0x00 – R
0 H0 R/W
0 H0 R/W
0x0 – R
0x0 H0 R/W
0x0 H0 R/W
0 H0 R/W
0 H0 R/W
0x0 H0 R/W
0 – R
0x7 H0 R/W
0x00 – R
0x00 – R
0x0 H0 R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
S1C31D50/D51 TECHNICAL MANUAL
Remarks
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Cleared by writing 1.
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Remarks
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Cleared by writing 1.
(Rev. 2.00)