Epson S1C31D50 Technical Manual page 94

Cmos 32-bit single chip
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7 I/O PORTS (PPORT)
Register name
Bit
P1CHATEN
15–8 –
(P1 Port Chattering
7
Filter Enable Register)
6
5
4
3
2
1
0
P1MODSEL
15–8 –
(P1 Port Mode Select
7
Register)
6
5
4
3
2
1
0
P1FNCSEL
15–14 P17MUX[1:0]
(P1 Port Function
13–12 P16MUX[1:0]
Select Register)
11–10 P15MUX[1:0]
9–8 P14MUX[1:0]
7–6 P13MUX[1:0]
5–4 P12MUX[1:0]
3–2 P11MUX[1:0]
1–0 P10MUX[1:0]
P1SELy = 0
Port
P1yMUX = 0x0
name
GPIO
(Function 0)
Peripheral
P10
P10
P11
P11
P12
P12
P13
P13
P14
P14
P15
P15
P16
P16
P17
P17
*1: Refer to the "Universal Port Multiplexer" chapter.
7-16
Bit name
Initial
0x00
P1CHATEN7
0
P1CHATEN6
0
P1CHATEN5
0
P1CHATEN4
0
P1CHATEN3
0
P1CHATEN2
0
P1CHATEN1
0
P1CHATEN0
0
0x00
P1SEL7
0
P1SEL6
0
P1SEL5
0
P1SEL4
0
P1SEL3
0
P1SEL2
0
P1SEL1
0
P1SEL0
0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Table 7.7.2.2 P1 Port Group Function Assignment
P1yMUX = 0x1
(Function 1)
Pin
Peripheral
UPMUX
UPMUX
UPMUX
UPMUX
UPMUX
UPMUX
UPMUX
UPMUX
Seiko Epson Corporation
Reset
R/W
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
P1SELy = 1
P1yMUX = 0x2
(Function 2)
Pin
Peripheral
Pin
ADC12A
ADIN07
*1
ADC12A
ADIN06
*1
ADC12A
ADIN05
*1
ADC12A
ADIN04
*1
*1
ADC12A
ADIN03
ADC12A
ADIN02
*1
ADC12A
ADIN01
*1
ADC12A
ADIN00
*1
48
64
Remarks
pin
pin
P1yMUX = 0x3
48
64
(Function 3)
pin
pin
Peripheral
Pin
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
80
100
pin
pin
80
100
pin
pin

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