Table of Contents
Advertisement
21 HW Processor (HWP) and Sound Output
S1C31D50
HWP
HWPIE
CPU core
HWP0TRG
HWPEN
SDAC
Clock generator
CLKSRC[1:0]
CLKDIV[1:0]
DBRUN
SDACEN
ERRIE
DATREQIE
S1C31D51
HWP
HWPIE
CPU core
HWP0TRG
HWPEN
SDAC
Clock generator
CLKSRC[1:0]
CLKDIV[1:0]
DBRUN
SDACEN
ERRIE
DATREQIE
Notes: • In addition to the control registers in the MCU peripheral circuit area, the HWP has HWP in-
ternal registers (address 0x00156700 to address 0x0015674c) that are used for specifying
the function and command to be executed and monitoring the operation state. These inter-
nal registers are switched between the sound play function registers and the memory check
function registers according to the selected function.
In this chapter, the register names that begin with HWP or SDAC represent a control register
in the MCU peripheral circuit area, other names represent a HWP internal register.
• For the specifications of sound data and the setting of the external Flash memory for storing
sound data, refer to the application note or the sample software manual.
21-2
HWP1IF
HWP0IF
Interrupt control circuit
RAM
(14KB)
Memory check circuit
HWP internal registers
Command control
circuit
(SDACDAT register)
PWMOUTEN
MODE
Interrupt control circuit
ERRIF
DATREQIF
HWP1IF
HWP0IF
Interrupt control circuit
RAM
(12KB)
Memory check circuit
HWP internal registers
Command control
circuit
(SDACDAT register)
PWMOUTEN
MODE
Interrupt control circuit
ERRIF
DATREQIF
Figure 21.1.1 HWP Configuration
Seiko Epson Corporation
ID[7:0]
Sound decoder
Sound buffer
Sound signal
generator
ID[7:0]
Sound decoder
Sound buffer
Sound signal
generator
S1C31D50/D51 TECHNICAL MANUAL
Embedded
Flash memory,
RAM
Quad
External
synchronous
Flash
serial interface
memory
SDACOUT_P
SDACOUT_N
Embedded
Flash memory,
RAM
Quad
External
synchronous
Flash
serial interface
memory
T16B Ch.0
TOUT00
Sound signal
generator
TOUT01
SDACOUT_P
SDACOUT_N
(Rev. 2.00)
Advertisement
Table of Contents
