Epson S1C31D50 Technical Manual page 375

Address Register name
0x0020 P2CHATEN
022a (P2 Port Chattering
Filter Enable Register)
0x0020 P2MODSEL
022c (P2 Port Mode Select
Register)
0x0020 P2FNCSEL
022e (P2 Port Function
Select Register)
0x0020 P3DAT
0230 (P3 Port Data
Register)
0x0020 P3IOEN
0232 (P3 Port Enable
Register)
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Bit Bit name
15–8 –
7 P2CHATEN7
6 P2CHATEN6
5 P2CHATEN5
4 P2CHATEN4
3 P2CHATEN3
2 P2CHATEN2
1 P2CHATEN1
0 P2CHATEN0
15–8 –
7 P2SEL7
6 P2SEL6
5 P2SEL5
4 P2SEL4
3 P2SEL3
2 P2SEL2
1 P2SEL1
0 P2SEL0
15–14 P27MUX[1:0]
13–12 P26MUX[1:0]
11–10 P25MUX[1:0]
9–8 P24MUX[1:0]
7–6 P23MUX[1:0]
5–4 P22MUX[1:0]
3–2 P21MUX[1:0]
1–0 P20MUX[1:0]
15 P3OUT7
14 P3OUT6
13 P3OUT5
12 P3OUT4
11 P3OUT3
10 P3OUT2
9 P3OUT1
8 P3OUT0
7 P3IN7
6 P3IN6
5 P3IN5
4 P3IN4
3 P3IN3
2 P3IN2
1 P3IN1
0 P3IN0
15 P3IEN7
14 P3IEN6
13 P3IEN5
12 P3IEN4
11 P3IEN3
10 P3IEN2
9 P3IEN1
8 P3IEN0
7 P3OEN7
6 P3OEN6
5 P3OEN5
4 P3OEN4
3 P3OEN3
2 P3OEN2
1 P3OEN1
0 P3OEN0
Seiko Epson Corporation
Initial Reset R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R
0 H0 R
0 H0 R
0 H0 R
0 H0 R
0 H0 R
0 H0 R
0 H0 R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
48 64 80 100
Remarks
pin pin pin pin
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AP-A-11
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