Epson S1C31D50 Technical Manual page 22

QFP15-100PIN
Port function
or signal
assignment Pin name
#RESET #RESET 76
V V 77
DD DD
OSC1 78
OSC1
OSC2 79
OSC2
80
P56 P56
81
P57 P57
82
P80 P80
83
P81 P81
84
P82 P82
P83/EXOSC P83 85
P84/EXCL00 P84 86
P85/EXCL01 P85 87
P86 P86 88
P87 P87 89
P70 P70 90
P71 P71 91
P72/EXCL10 P72 92
P73/EXCL11 P73 93
P74 P74 94
P75 P75 95
SWCLK/PD0 PD0 96
SWD/PD1 PD1 97
TEST TEST 98
P76 P76 99
P77 P77 100
Figure 1.3.1.4 S1C31D50/D51 Pin Configuration Diagram (QFP15-100PIN)
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
Seiko Epson Corporation
1 OVERVIEW
50 P60 P60
49 P47 P47
48 P46 P46/RTC1S
47 P45 P45/#ADTRG0
46 P44 P44
45 P43 P43
44 P42 P42
43 P41 P41
42 P40 P40/VREFA0
41 P17 P17/UPMUX/ADIN00
40 P16 P16/UPMUX/ADIN01
39 P15 P15/UPMUX/ADIN02
38 P14 P14/UPMUX/ADIN03
37 P13 P13/UPMUX/ADIN04
36 P12 P12/UPMUX/ADIN05
35 P11 P11/UPMUX/ADIN06
34 P10 P10/UPMUX/ADIN07
33 P07 P07/UPMUX
32 P06 P06/UPMUX
31 P05 P05/UPMUX
30 P04 P04/UPMUX
29 P03 P03/UPMUX
28 P02 P02/UPMUX
27 P01 P01/UPMUX
26 P00 P00/UPMUX
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