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21 HW Processor (HWP) and Sound Output
Memory Size Register
Register name
Bit
MEMSIZE
31–0 SIZE[31:0]
(Memory Check)
Bits 31–0 SIZE[31:0]
These bits specify the size in bytes of the memory to be checked.
Initial Value Setting Register
Register name
Bit
INITVALUE
31–0 INITVALUE[31:0]
(Memory Check)
Bits 31–0 INITVALUE[31:0]
These bits set the initial value used for the calculation of the Flash check (checksum, CRC). Normally,
set to 0x0000 0000.
Command Register
Register name
Bit
COMMAND
15–8 –
(Memory Check)
7–0 COMMAND[7:0]
Bits 15–8 Reserved
Set to 0x00 when writing data to this register.
Bits 7–0
COMMAND[7:0]
These bits select a memory check command to be executed.
COMMAND.COMMAND[7:0] bits
State Monitor Register
Register name
Bit
STATE
15–0 STATE[15:0]
(Memory Check)
Bits 15–0 STATE[15:0]
These bits indicate the current state of the memory check function.
21-24
Bit name
Initial
0x0000
0000
Bit name
Initial
0x0000
0000
Bit name
Initial
0x00
0x00
Table 21.6.9 Memory Check Command Selection
0xff
0xfe–0x06
0x05
0x04
0x03
0x02
0x00, 0x01
Bit name
Initial
0x0000
Table 21.6.10 State Monitor
STATE.STATE[15:0] bits
0x0005
0x0004
0x0003
0x0002
0x0001
0x0000
Seiko Epson Corporation
Reset
R/W
H0
W
–
Reset
R/W
H0
W
–
Reset
R/W
–
R
–
H0
W
Memory check command
Memory Check Stop
Setting prohibited (error)
Flash CRC Start
Flash Checksum Start
RAM Check March-C Start
RAM Check R/W Start
No operation
Reset
R/W
H0
R
–
State
mc_state_crc
mc_state_checksum
mc_state_ram_march_c
mc_state_ram_rw
mc_state_idle
mc_state_init
S1C31D50/D51 TECHNICAL MANUAL
Remarks
Remarks
Remarks
Remarks
(Rev. 2.00)
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