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7 I/O Ports (PPORT)
7.1 Overview
PPORT controls the I/O ports. The main features are outlined below.
• Allows port-by-port function configurations.
- Each port can be configured with or without a pull-up or pull-down resistor.
- Each port can be configured with or without a chattering filter.
- Allows selection of the function (general-purpose I/O port (GPIO) function, up to four peripheral I/O func-
tions) to be assigned to each port.
• Ports, except for those shared with debug pins, are initially placed into Hi-Z state.
(No current passes through the pin during this Hi-Z state.)
Note: 'x', which is used in the port names Pxy, register names, and bit names, refers to a port group (x
= 0, 1, 2, ··· , d) and 'y' refers to a port number (y = 0, 1, 2, ··· , 7).
Figure 7.1.1 shows the configuration of PPORT.
Item
Port groups included
P0 P0[6:3]
P1 P1[7:3]
P2 P2[3:0]
P3 P3[2:0]
P4 P4[6:5], P40
P5 P5[1:0]
P6 P6[2:1]
P7 P7[3:2]
P8 P8[5:3]
P9 P9[5:0]
Pa Pa3
Pd Pd[3:0]
Total number of ports
39 ports
Ports for debug function
Key-entry reset function
*1 Ports with general-purpose I/O function (GPIO)
*2 Ports with interrupt function
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
Table 7.1.1 Port Configuration of S1C31D50/D51
48-pin package
64-pin package
(4)
P0[6:3]
*1, *2
(5)
P1[7:1]
*1, *2
(4)
P2[7:0]
*1, *2
(3)
P3[4:0]
*1, *2
(3)
P4[6:3], P40
*1, *2
(2)
P5[1:0]
*1, *2
(2)
P6[2:1]
*1, *2
(2)
P7[3:0]
*1, *2
(3)
P8[5:1]
*1, *2
(6)
P9[5:0]
*1, *2
(1)
Pa[3:1]
*1, *2
(4)
Pd[3:0]
*1
55 ports
Seiko Epson Corporation
80-pin package
(4)
P0[7:3]
(5)
*1, *2
*1, *2
(7)
P1[7:0]
(8)
*1, *2
*1, *2
(8)
P2[7:0]
(8)
*1, *2
*1, *2
(5)
P3[5:0]
(6)
*1, *2
*1, *2
(5)
P4[6:0]
(7)
*1, *2
*1, *2
(2)
P5[3:0]
(4)
*1, *2
*1, *2
(2)
P6[4:1]
(4)
*1, *2
*1, *2
(4)
P7[4:0]
(5)
*1, *2
*1, *2
(5)
P8[7:0]
(8)
*1, *2
*1, *2
(6)
P9[5:0]
(6)
*1, *2
*1, *2
(3)
Pa[4:0]
(5)
*1, *2
*1, *2
(4)
Pd[4:0]
(5)
*1
*1
71 ports
Pd[1:0]
Unavailable
7 I/O PORTS (PPORT)
100-pin package
P0[7:0]
(8)
*1, *2
P1[7:0]
(8)
*1, *2
P2[7:0]
(8)
*1, *2
P3[7:0]
(8)
*1, *2
P4[7:0]
(8)
*1, *2
P5[7:0]
(8)
*1, *2
P6[7:0]
(8)
*1, *2
P7[7:0]
(8)
*1, *2
P8[7:0]
(8)
*1, *2
P9[5:0]
(6)
*1, *2
Pa[6:0]
(7)
*1, *2
Pd[5:0]
(6)
*1
91 ports
7-1
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