P5 Port Group - Epson S1C31D50 Technical Manual

Cmos 32-bit single chip
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7 I/O PORTS (PPORT)

7.7.6 P5 Port Group

The P5 port group supports the GPIO and interrupt functions.
Register name
Bit
P5DAT
15
(P5 Port Data
14
Register)
13
12
11
10
9
8
7
6
5
4
3
2
1
0
P5IOEN
15
(P5 Port Enable
14
Register)
13
12
11
10
9
8
7
6
5
4
3
2
1
0
P5RCTL
15
(P5 Port Pull-up/down
14
Control Register)
13
12
11
10
9
8
7
6
5
4
3
2
1
0
7-24
Table 7.7.6.1 Control Registers for P5 Port Group
Bit name
Initial
P5OUT7
0
P5OUT6
0
P5OUT5
0
P5OUT4
0
P5OUT3
0
P5OUT2
0
P5OUT1
0
P5OUT0
0
P5IN7
0
P5IN6
0
P5IN5
0
P5IN4
0
P5IN3
0
P5IN2
0
P5IN1
0
P5IN0
0
P5IEN7
0
P5IEN6
0
P5IEN5
0
P5IEN4
0
P5IEN3
0
P5IEN2
0
P5IEN1
0
P5IEN0
0
P5OEN7
0
P5OEN6
0
P5OEN5
0
P5OEN4
0
P5OEN3
0
P5OEN2
0
P5OEN1
0
P5OEN0
0
P5PDPU7
0
P5PDPU6
0
P5PDPU5
0
P5PDPU4
0
P5PDPU3
0
P5PDPU2
0
P5PDPU1
0
P5PDPU0
0
P5REN7
0
P5REN6
0
P5REN5
0
P5REN4
0
P5REN3
0
P5REN2
0
P5REN1
0
P5REN0
0
Seiko Epson Corporation
Reset
R/W
Remarks
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
S1C31D50/D51 TECHNICAL MANUAL
48
64
80
100
pin
pin
pin
pin
(Rev. 2.00)

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