Epson S1C31D50 Technical Manual page 321

Cmos 32-bit single chip
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Note: The volume level can be adjusted by rewriting the VOLUME_n.VOLUME[15:0] bits even while
playback is in progress. The playback speed cannot be changed while playback is in progress.
2-channel mix output start procedure
The HWP can output sound by mixing two channels, for instance, Ch.0 is used for voice and Ch.1 is used
for BGM. To do this, the channels should be controlled continuously to start playback as shown below.
Ch.1 (BGM) output start procedure
1. Confirm that the STATE_1.STATE[15:0] bits = 0x0001 (sp_state_idle).
2. Confirm that the STATUS.READY bit = 1.
3. Configure the following sound play register bits:
- Set the COMMAND_1.COMMAND[7:0] bits to 0x01.
- SENTENCE_1.SENTENCE_NO[15:0] bits
- VOLUME_1.VOLUME[15:0] bits
- REPEAT_1.REPEAT[15:0] bits
4. Write 1 to the HWPCMDTRG.HWP0TRG bit.
5. Wait until the HWPINTF.HWP0IF bit is set to 1 (interrupt).
The HWP starts BGM data output of the specified sentence number from this point.
6. Confirm that the STATE_1.STATE[15:0] bits = 0x0002 (sp_state_play) as necessary.
7. Write 0 to the HWPINTF.HWP0IF bit.
Ch.0 (voice) output start procedure
8. Confirm that the STATE_0.STATE[15:0] bits = 0x0001 (sp_state_idle).
9. Confirm that the STATUS.READY bit = 1.
10. Configure the following sound play register bits:
- Set the COMMAND_0.COMMAND[7:0] bits to 0x01.
- SENTENCE_0.SENTENCE_NO[15:0] bits
- VOLUME_0.VOLUME[15:0] bits
- REPEAT_0.REPEAT[15:0] bits
- SPEED_0.SPEED[15:0] bits
11. Write 1 to the HWPCMDTRG.HWP0TRG bit.
12. Wait until the HWPINTF.HWP0IF bit is set to 1 (interrupt).
The HWP starts voice data output of the specified sentence number from this point.
13. Confirm that the STATE_0.STATE[15:0] bits = 0x0002 (sp_state_play) as necessary.
14. Write 0 to the HWPINTF.HWP0IF bit.
:
Playback is in progress. (The SDAC outputs the mixed sound of Ch.0 and Ch.1.)
:
Confirming end of Ch.0 (voice) output
15. Wait until the HWPINTF.HWP0IF bit is set to 1 (interrupt).
16. Confirm that the STATE_0.STATE[15:0] bits = 0x0001 (sp_state_idle) as necessary.
17. Write 0 to the HWPINTF.HWP0IF bit.
Confirming end of Ch.1 (BGM) output
18. Wait until the HWPINTF.HWP0IF bit is set to 1 (interrupt).
19. Confirm that the STATE_1.STATE[15:0] bits = 0x0001 (sp_state_idle) as necessary.
20. Write 0 to the HWPINTF.HWP0IF bit.
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
21 HW Processor (HWP) and Sound Output
Seiko Epson Corporation
(Command acceptable)
(Select Sound Start command)
(Specify sentence number)
(Specify volume level)
(Specify repeat count)
(Trigger to issue command)
(Occurrence of state transition)
(Clear interrupt flag)
(Command acceptable)
(Select Sound Start command)
(Specify sentence number)
(Specify volume level)
(Specify repeat count)
(Specify playback speed)
(Trigger to issue command)
(Occurrence of state transition)
(Clear interrupt flag)
(Occurrence of state transition)
(Clear interrupt flag)
(Occurrence of state transition)
(Clear interrupt flag)
21-9

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