Epson Arm S1C31 Series Technical Manual page 18

Cmos 32-bit single chip microcontroller
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S1C31D41 lineup
Interrupt
Non-maskable interrupt
Programmable interrupt
Power supply voltage
V
operating voltage
DD
V
operating voltage for Flash
DD
programming
QSPI-Flash interface power voltage
Operating temperature
Operating temperature range
Current consumption (Typ. value)
SLEEP mode
*2
HALT mode
*3
RUN mode
Shipping form
Package
*4
*1 The input filter in I2C (SDA and SCL inputs) does not comply with the standard for removing noise spikes less than 50 ns.
*2 SLEEP mode refers to deep sleep mode in the Cortex
*3 HALT mode refers to sleep mode in the Cortex
*4 Shown in parentheses are JEITA package names.
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
32-pin package
6 systems (Reset, NMI, HardFault, SVCall, PendSV, SysTic)
External interrupt: 3 systems
Internal interrupt: 27 systems
1.8 to 5.5 V * If V
> 3.6 V, the V
DD
2.2 to 5.5 V
3.0 to 3.6 V (voltage different from V
-40 to 85 °C
0.34 µA
IOSC = OFF, OSC1 = OFF, OSC3 = OFF
0.9 µA
IOSC = OFF, OSC1 = 32.768 kHz (crystal oscillator), OSC3 = OFF, RTCA = ON
1.5 µA
IOSC = OFF, OSC1 = 32.768 kHz (crystal oscillator), OSC3 = OFF
215 µA/MHz
V
voltage mode = mode0, CPU = IOSC
D1
130 µA/MHz
V
voltage mode = mode1, CPU = IOSC
D1
TQFP12-32PIN
(P-TQFP0328-0707-0.80, 7 × 7
mm, t = 1.2 mm, 0.8 mm pitch)
-M0+ processor. The RAM retains data even in SLEEP mode.
®
-M0+ processor.
®
Seiko Epson Corporation
48-pin package
voltage mode must be set to mode0.
D1
can be supplied.)
DD
TQFP12-48PIN
(P-TQFP048-0707-0.50, 7 × 7
mm, t = 1.2 mm, 0.5 mm pitch)
1 OVERVIEW
64-pin package
QFP13-64PIN
(P-LQFP064-1010-0.50, 10 × 10
mm, t = 1.7 mm, 0.5 mm pitch)
1-3

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