Clock Settings; Rfc Operating Clock; Clock Supply In Sleep Mode; Clock Supply In Debug Mode - Epson Arm S1C31 Series Technical Manual

Cmos 32-bit single chip microcontroller
Table of Contents

Advertisement

Figure 21.2.2.3 External Clock Input in External Clock Input Mode

21.3 Clock Settings

21.3.1 RFC Operating Clock

When using the RFC, the RFC operating clock TCCLK must be supplied to the RFC from the clock generator. The
TCCLK supply should be controlled as in the procedure shown below.
1. Enable the clock source in the clock generator if it is stopped (refer to "Clock Generator" in the "Power Supply,
Reset, and Clocks" chapter).
2. Set the following RFC_nCLK register bits:
- RFC_nCLK.CLKSRC[1:0] bits (Clock source selection)
- RFC_nCLK.CLKDIV[1:0] bits (Clock division ratio selection = Clock frequency setting)
The time base counter performs counting with TCCLK set here. Selecting a higher clock results in higher conver-
sion accuracy, note, however, that the frequency should be determined so that the time base counter will not over-
flow during reference oscillation.

21.3.2 Clock Supply in SLEEP Mode

When using RFC during SLEEP mode, the RFC operating clock TCCLK must be configured so that it will keep
supplying by writing 0 to the CLGOSC.xxxxSLPC bit for the TCCLK clock source.

21.3.3 Clock Supply in DEBUG Mode

The TCCLK supply during DEBUG mode should be controlled using the RFC_nCLK.DBRUN bit.
The TCCLK supply to the RFC is suspended when the CPU enters DEBUG mode if the RFC_nCLK.DBRUN bit
= 0. After the CPU returns to normal mode, the TCCLK supply resumes. Although the RFC stops operating when
the TCCLK supply is suspended, the output pin and registers retain the status before DEBUG mode was entered. If
the RFC_nCLK.DBRUN bit = 1, the TCCLK supply is not suspended and the RFC will keep operating in DEBUG
mode.

21.4 Operations

21.4.1 Initialization

The RFC should be initialized with the procedure shown below.
1. Configure the RFC_nCLK.CLKSRC[1:0] and RFC_nCLK.CLKDIV[1:0] bits. (Configure operating clock)
2. Set the following bits when using the interrupt:
- Write 1 to the interrupt flags in the RFC_nINTF register.
- Set the interrupt enable bits in the RFC_nINTE register to 1.
3. Assign the RFC input/output function to the ports. (Refer to the "I/O Ports" chapter.)
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
SENBn
SENAn
REFn
RFINn
S1C31 RFC
* Leave the unused pins open.
Seiko Epson Corporation
21 R/F CONVERTER (RFC)
Square wave
Sine wave
(Clear interrupt flags)
(Enable interrupts)
21-3

Advertisement

Table of Contents
loading

This manual is also suitable for:

Arm s1c31d41

Table of Contents