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n_minus_1
Set the number of DMA transfers to be executed successively.
Number of successive transfers (N) = n_minus_1 + 1
When the set number of successive transfers has completed, a transfer completion interrupt occurs.
cycle_ctrl
Set the DMA transfer mode. For detailed information on each transfer mode, refer to Section 6.5, "DMA Trans-
fer Mode."
6.5 DMA Transfer Mode
6.5.1 Basic Transfer
This is the basic DMA transfer mode. In this mode, DMA transfer starts when a DMA transfer request from a pe-
ripheral circuit or a software DMA request is issued, and it continues until it is completed for the set number of suc-
cessive transfers or it is suspended at the arbitration cycle. To resume the DMA transfer suspended at the arbitration
cycle, a DMA transfer request must be reissued.
When the set number of successive transfers has completed, a transfer completion interrupt occurs.
DMA transfer
DMA transfer 1 DMA transfer 2
operation
DMACENDIF.ENDIFn
DMA transfer request
6.5.2 Auto-Request Transfer
Similar to the basic transfer, DMA transfer starts when a DMA transfer request from a peripheral circuit or a soft-
ware DMA request is issued, and it continues until it is completed for the set number of successive transfers or it is
suspended at the arbitration cycle. The DMAC resumes the DMA transfer suspended at the arbitration cycle with-
out a DMA transfer request being reissued.
When the set number of successive transfers has completed, a transfer completion interrupt occurs.
DMA transfer
DMA transfer 1 DMA transfer 2
operation
DMACENDIF.ENDIFn
DMA transfer request
Figure 6.5.2.1 Auto-Request Transfer Operation Example (N = 8, 2
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
Table 6.4.3.5 DMA Transfer Mode
cycle_ctrl
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
Figure 6.5.1.1 Basic Transfer Operation Example (N = 8, 2
Seiko Epson Corporation
DMA transfer mode
Peripheral scatter-gather transfer
(for alternate data structure)
Peripheral scatter-gather transfer
(for primary data structure)
Memory scatter-gather transfer
(for alternate data structure)
Memory scatter-gather transfer
(for primary data structure)
Ping-pong transfer
Auto-request transfer
Basic transfer
Stop
DMA transfer 3 DMA transfer 4
DMA transfer request
DMA transfer 3 DMA transfer 4
6 DMA CONTROLLER (DMAC)
DMA transfer 7 DMA transfer 8
DMA transfer request
R
= 2)
DMA transfer 7 DMA transfer 8
R
= 2)
6-5
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