Clg Oscillation Frequency Trimming Register 3 - Epson Arm S1C31 Series Technical Manual

Cmos 32-bit single chip microcontroller
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CLG Oscillation Frequency Trimming Register 3

Register name
Bit
CLGTRIM3
15–9 –
8–0 OSC3SAJ[8:0]
Bits 15–9 Reserved
Bits 8–0
OSC3SAJ[8:0]
These bits set the frequency trimming value for the OSC3 internal oscillator circuit.
This setting does not affect the OSC3 crystal/ceramic oscillation frequency.
Table 2.6.16 Oscillation Frequency Trimming Setting of OSC3 Internal Oscillator Circuit
Note: The initial value of the CLGTRIM3.OSC3SAJ[8:0] bits was adjusted so that the OSC3
oscillator circuit characteristics described in the "Electrical Characteristics" chapter can be
guaranteed. Be aware that the frequency characteristic may not be satisfied when this setting
is altered. When altering this setting, always make sure that the OSC3 oscillator circuit is
inactive.
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
Bit name
Initial
0x00
CLGTRIM3.OSC3SAJ[8:0] bits
0x1ff
:
0x00
Seiko Epson Corporation
2 POWER SUPPLY, RESET, AND CLOCKS
Reset
R/W
R
H0
R/WP * Determined by factory adjustment.
*
OSC3 internal oscillator frequency
High
:
Low
Remarks
2-25

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