Uart3 Ch.n Baud-Rate Register; Uart3 Ch.n Control Register - Epson Arm S1C31 Series Technical Manual

Bit 0 STPB
This bit sets the stop bit length.
1 (R/W): 2 bits
0 (R/W): 1 bit
Notes: • The UART3_nMOD register settings can be altered only when the UART3_nCTL.MODEN bit
= 0.
• Do not set both the UART3_nMOD.IRMD and UART3_nMOD.CAREN bits simultaneously.
UART3 Ch.n Baud–Rate Register
Register name Bit
UART3_nBR 15–12 –
11–8 FMD[3:0]
7–0 BRT[7:0]
Bits 15–12 Reserved
Bits 11–8 FMD[3:0]
Bits 7–0 BRT[7:0]
These bits set the UART3 transfer rate. For more information, refer to "Baud Rate Generator."
Notes: • The UART3_nBR register settings can be altered only when the UART3_nCTL.MODEN bit = 0.
• Do not set the UART3_nBR.FMD[3:0] bits to a value other than 0 to 3 when the UART3_
nMOD.BRDIV bit = 1.

UART3 Ch.n Control Register

Register name Bit
UART3_nCTL 15–8 –
7–2 –
1
0
Bits 15–2 Reserved
Bit 1 SFTRST
This bit issues software reset to the UART3.
1 (W): Issue software reset
0 (W): Ineffective
1 (R): Software reset is executing.
0 (R): Software reset has finished. (During normal operation)
Setting this bit resets the UART3 transmit/receive control circuit and interrupt flags. This bit is auto-
matically cleared after the reset processing has finished.
Bit 0 MODEN
This bit enables the UART3 operations.
1 (R/W): Enable UART3 operations (The operating clock is supplied.)
0 (R/W): Disable UART3 operations (The operating clock is stopped.)
Note: If the UART3_nCTL.MODEN bit is altered from 1 to 0 while sending/receiving data, the data
being sent/received cannot be guaranteed. When setting the UART3_nCTL.MODEN bit to 1
again after that, be sure to write 1 to the UART3_nCTL.SFTRST bit as well.
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
Bit name Initial
0x0
0x0
0x00
Bit name Initial
0x00
0x00
SFTRST 0
MODEN 0
Seiko Epson Corporation
Reset R/W
– R –
H0 R/W
H0 R/W
Reset R/W
– R –
– R
H0 R/W
H0 R/W
13 UART (UART3)
Remarks
Remarks
13-13