Clg Oscillation Frequency Trimming Register 1; Clg Oscillation Frequency Trimming Register 2 - Epson Arm S1C31 Series Technical Manual

Cmos 32-bit single chip microcontroller
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2 POWER SUPPLY, RESET, AND CLOCKS

CLG Oscillation Frequency Trimming Register 1

Register name
Bit
CLGTRIM1
15–14 –
13–8 IOSCLSAJ[5:0]
7–6 –
5–0 IOSCHSAJ[5:0]
Bits 15–14 Reserved
Bits 13–8 IOSCLSAJ[5:0]
These bits set the frequency trimming value for the IOSC internal oscillator circuit.
This setting affects the low-speed oscillation frequencies (1 MHz and 2 MHz).
Table 2.6.13 Low-Speed Oscillation Frequency Trimming Setting of IOSC Internal Oscillator Circuit
CLGTRIM1.IOSCLSAJ[5:0] bits
Bits 7–6
Reserved
Bits 5–0
IOSCHSAJ[5:0]
These bits set the frequency trimming value for the IOSC internal oscillator circuit.
This setting affects the high-speed oscillation frequency (8 MHz).
Table 2.6.14 High-Speed Oscillation Frequency Trimming Setting of IOSC Internal Oscillator Circuit
CLGTRIM1.IOSCHSAJ[5:0] bits
Note: The initial values of the CLGTRIM1.IOSCLSAJ[5:0] and CLGTRIM1.IOSCHSAJ[5:0] bits were
adjusted so that the IOSC oscillator circuit characteristics described in the "Electrical Character-
istics" chapter can be guaranteed. Be aware that the frequency characteristics may not be sat-
isfied when these settings are altered. When altering these settings, always make sure that the
IOSC oscillator circuit is inactive.

CLG Oscillation Frequency Trimming Register 2

Register name
Bit
CLGTRIM2
15–8 –
7–6 –
5–0 OSC1SAJ[5:0]
Bits 15–6 Reserved
Bits 5–0
OSC1SAJ[5:0]
These bits set the frequency trimming value for the OSC1 internal oscillator circuit.
This setting does not affect the OSC1 crystal oscillation frequency.
Table 2.6.15 Oscillation Frequency Trimming Setting of OSC1 Internal Oscillator Circuit
Note: The initial value of the CLGTRIM2.OSC1SAJ[5:0] bits was adjusted so that the OSC1
oscillator circuit characteristics described in the "Electrical Characteristics" chapter can be
guaranteed. Be aware that the frequency characteristic may not be satisfied when this setting
is altered. When altering this setting, always make sure that the OSC1 oscillator circuit is
inactive.
2-24
Bit name
Initial
0x0
0x0
0x3f
:
0x00
0x3f
:
0x00
Bit name
Initial
0x00
0x0
CLGTRIM2.OSC1SAJ[5:0] bits
0x3f
:
0x00
Seiko Epson Corporation
Reset
R/W
R
H0
R/WP * Determined by factory adjustment.
*
R
H0
R/WP * Determined by factory adjustment.
*
IOSC oscillation frequency (2/1 MHz)
High
:
Low
IOSC oscillation frequency (8 MHz)
High
:
Low
Reset
R/W
R
R
H0
R/WP * Determined by factory adjustment.
*
OSC1 internal oscillator frequency
High
:
Low
Remarks
Remarks
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)

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