0X5061: Oscillation Control Register (Osc_Ctl) - Epson S1C17001 Technical Manual

7 OSCILLATOR CIRCUIT (OSC)

0x5061: Oscillation Control Register (OSC_CTL)

Register name Address Bit
Oscillation 0x5061 D7–6 –
Control Register (8 bits)
D5–4 OSC3WT[1:0] OSC3 wait cycle select
(OSC_CTL)
D3–2 –
D1
D0
D[7:6] Reserved
D[5:4] OSC3WT[1:0]: OSC3 Wait Cycle Select Bits
An oscillation stabilization wait timer is set to prevent malfunctions due to unstable clock operation at
the start of OSC3 oscillation.
The OSC3 clock is not fed to the system immediately after OSC3 oscillation starts—for example, when
power is first turned on, on awaking from SLEEP, or when the OSC3 oscillation circuit is turned on via
software—until the time set here has elapsed.
This is set to 1,024 cycles (OSC3 clock) after initial resetting. The CPU does not begin operating im-
mediately after resetting until this time has elapsed.
Note: The OSC3 oscillation start time depends on the oscillator and externally connected compo-
nents. The time should be set with an adequate oscillation stabilization wait time. Refer to the
typical oscillation start times specified in "24 Electrical Characteristics."
D1 OSC1EN: OSC1 Enable Bit
Permits or prohibits OSC1 oscillator circuit operation.
1 (R/W): Permitted (on) (default)
0 (R/W): Prohibited (off)
Note: • The OSC1 oscillator circuit cannot be stopped if the OSC1 clock is being used as the sys-
tem clock.
• The OSC1 clock is not fed to the system for 256 cycles to prevent malfunctions immedi-
ately after OSC1 oscillation is started by changing the OSC1EN setting from 0 to 1.
D0 OSC3EN: OSC3 Enable Bit
Permits or prohibits OSC3 oscillator circuit operation.
1 (R/W): Permitted (on) (default)
0 (R/W): Prohibited (off)
Note: The OSC3 oscillator circuit cannot be stopped if the OSC3 clock is being used as the system
clock.
66
Name Function
reserved
reserved
OSC1EN OSC1 enable
OSC3EN OSC3 enable
Table 7.8.2: OSC3 oscillation stabilization wait time settings
OSC3WT[1:0]
0x3
0x2
0x1
0x0
Setting
–
OSC3WT[1:0]
0x3
0x2
0x1
0x0 1024 cycles
–
1 Enable 0 Disable
1 Enable 0 Disable
Oscillation stabilization
wait time
128 cycles
256 cycles
512 cycles
1,024 cycles
(Default: 0x0)
EPSON
Init. R/W Remarks
– – 0 when being read.
Wait cycle 0x0 R/W
128 cycles
256 cycles
512 cycles
– – 0 when being read.
1 R/W
1 R/W
S1C17001 TECHNICAL MANUAL