0X5064: Fout Control Register (Osc_Fout) - Epson S1C17001 Technical Manual

7 OSCILLATOR CIRCUIT (OSC)

0x5064: FOUT Control Register (OSC_FOUT)

Register name Address Bit
FOUT Control 0x5064 D7–4 –
Register (8 bits)
D3–2 FOUT3D[1:0] FOUT3 clock division ratio select
(OSC_FOUT)
D1
D0
D[7:4] Reserved
D[3:2] FOUT3D[1:0]: FOUT3 Clock Division Ratio Select Bits
Select the OSC3 clock division ratio to set the FOUT3 clock frequency.
D1 FOUT3E: FOUT3 Output Enable Bit
Permits or prohibits FOUT3 clock (OSC3 division clock) external output.
1 (R/W): Permitted (on)
0 (R/W): Prohibited (off) (default)
Setting FOUT3E to 1 outputs the FOUT3 clock from the FOUT3 pin. Setting it to 0 stops the output.
The FOUT3 output pin is combined with the P30 port. This functions as the P30 port pin by default, so
the pin function should be changed by writing 1 to P30MUX (D0/P3_PMUX register) if use is required
for FOUT3 output.
∗ P30MUX: P30 Port Function Select Bit in the P3 Port Function Select (P3_PMUX) Register
D0 FOUT1E: FOUT1 Output Enable Bit
Permits or prohibits FOUT1 clock (OSC1 clock) external output.
1 (R/W): Permitted (on)
0 (R/W): Prohibited (off) (default)
Setting FOUT1E to 1 outputs the FOUT1 clock from the FOUT1 pin. Setting it to 0 stops the output.
The FOUT1 output pin is combined with the P13 port. This functions as the P13 port pin by default, so
the pin function should be changed by writing 1 to P13MUX (D3/P1_PMUX register) if use is required
for FOUT1 output.
∗ P13MUX: P13 Port Function Select Bit in the P1 Port Function Select (P1_PMUX) Register
68
Name Function
reserved
FOUT3E FOUT3 output enable
FOUT1E FOUT1 output enable
Table 7.8.3: FOUT3 clock division ratio selection
FOUT3D[1:0]
0x3
0x2
0x1
0x0
(D0/0x52a3)
(D3/0x52a1)
Setting
–
FOUT3D[1:0] Division ratio
0x3
0x2
0x1
0x0
1 Enable 0 Disable
1 Enable 0 Disable
Division ratio
Reserved
OSC3-1/4
OSC3-1/2
OSC3-1/1
(Default: 0x0)
EPSON
Init. R/W Remarks
– – 0 when being read.
0x0 R/W
reserved
OSC3-1/4
OSC3-1/2
OSC3-1/1
0 R/W
0 R/W
S1C17001 TECHNICAL MANUAL