Internal Rom Area; Internal Rom; Rom Read Access Cycle Settings; 0X5320: Rom Control Register (Misc_Fl) - Epson S1C17001 Technical Manual

3.2 Internal ROM Area

3.2.1 Internal ROM

The 32 Kbyte area from address 0x8000 to 0xffff is ROM. This area can be used for writing application programs
and data. Address 0x8000 is defined as the vector table base address, and the vector table must be placed at the start
of this area (refer to "2.4 Vector Table"). ROM reads take 1 to 5 cycles.

3.2.2 ROM Read Access Cycle Settings

Set the IROM area read access cycles using FLCYC[2:0] (D[2:0]/MISC_FL register) to retain compatibility with
S1C17701. Normally, set FLCYC[2:0] to 0x4.

0x5320: ROM Control Register (MISC_FL)

Register name Address Bit
ROM 0x5320 D7–3 –
Control Register (8 bits)
D2–0 FLCYC[2:0] ROM read access cycle
(MISC_FL)
S1C17001 TECHNICAL MANUAL
Name Function
reserved
EPSON
3 MEMORY MAP AND BUS CONTROL
Setting Init. R/W
– –
FLCYC[2:0] Read cycle 0x3 R/W
0x7–0x5 reserved
0x4 1 cycle
0x3 5 cycles
0x2 4 cycles
0x1 3 cycles
0x0 2 cycles
Remarks
– 0 when being read.
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