Appendix E S1C17001 Mask Rom Code Development - Epson S1C17001 Technical Manual

Appendix E: S1C17001 Mask ROM
(1) The S1C17001 mask ROM code was developed using the S1C17704 Flash microprocessor.
(2) ROM data is provided to Epson in "file.PAn" (winmdc output) format. Final user verification of ROM data
should use "file.psa" (sconv32 output) format.
(3) Set the following arguments when executing moto2ff in the S1C17001.
• Data start address = 8,000
• Data block size =
(4) Use S1C17704 to check operations, confirming that the following functional differences are fully understood:
• The ROM size differs. Remove 32 KB of code in step (3) for final checking using "file.psa" (sconv 32 out-
put).
• The RAM size differs. Note the stack pointer addresses. Confirm that the data in addresses 0x800 to 0xfef
has not changed after checking program operations.
• Do not access LCD driver and SVD related registers that do not exist in the S1C17001.
Table E.1: Comparison of functions between S1C17704 and S1C17001.
Circuit/function
Flash
ROM (Mask ROM)
RAM
Display RAM
Operating frequency
OSC3 oscillator circuit
OSC1 oscillator circuit
Operation clock input (OSC3)
Operation clock input (OSC1)
Input/output port
External port interrupt
SPI (master/slave)
2
I C (master)
UART (IrDA1.0 compatible)
8-bit timer (T8F)
16-bit timer (T16)
PWM & capture timer (T16E)
Clock timer (CT)
Stopwatch timer (SWT)
Watchdog timer (WDT)
8-bit OSC1 timer (T8OSC1)
LCD driver
Power supply voltage detection (SVD)
circuit
Power supply voltage
S1C17001 TECHNICAL MANUAL
Code Development
8,000
32kHz to 8.2MHz
For evaluation use only
For evaluation use only
1.8V to 3.6V

APPENDIX E S1C17001 MASK ROM CODE DEVELOPMENT

S1C17704
64 Kbytes
None
4 Kbytes
572 bytes
Crystal/CR
Crystal
28
16
1ch.
1ch.
1ch.
1ch.
3ch.
1ch.
1ch.
1ch.
1ch.
1ch.
EPSON
S1C17001
None
32 Kbytes
2 Kbytes
None
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
None
None
Core voltage (LVDD): 1.65 to 2.7V
I/O voltage (HVDD): 1.65 to 3.6V
337