Port Input Interrupt - Epson S1C17001 Technical Manual

Cmos 16-bit single chip microcontroller
Table of Contents

Advertisement

10.7 Port Input Interrupt

Ports P0 and P1 include input interrupt functions.
Select which of the 16 ports are to be used for interrupts based on requirements. You can also select whether inter-
rupts are generated for either the rising edge or falling edge of input signals.
Figure 10.7.1 illustrates the port input interrupt circuit configuration.
Chattering filter
P00
P0CF1[2:0]
Interrupt edge selection
P0EDGE0
Interrupt enable
P0IE0
P07
P0CF2[2:0]
P0EDGE7
P0IE7
P10
P1EDGE0
P1IE0
P17
P1EDGE7
P1IE7
Interrupt port selection
Select the port generating an interrupt using PxIE[7:0] (Px_IMSK register).
∗ P0IE[7:0]: P0[7:0] Port Interrupt Enable Bits in the P0 Port Interrupt Mask (P0_IMSK) Register (D[7:0]/0x5205)
∗ P1IE[7:0]: P1[7:0] Port Interrupt Enable Bits in the P1 Port Interrupt Mask (P1_IMSK) Register (D[7:0]/0x5215)
Setting PxIE[7:0] to 1 enables interrupt generation by the corresponding port. Setting to 0 (default) disables in-
terrupt generation.
The interrupt controller must also be set to actually generate an interrupt. For more information on making in-
terrupt controller settings, refer to "6. Interrupt Controller (ITC)."
Interrupt edge selection
Port input interrupts can be generated at either the rising edge or falling edge of the input signal. Select the edge
used to generate interrupts using PxEDGE[7:0] (Px_EDGE register).
∗ P0EDGE[7:0]: P0[7:0] Port Interrupt Edge Select Bits in the P0 Port Interrupt Edge Select (P0_EDGE)
Register (D[7:0]/0x5206)
∗ P1EDGE[7:0]: P1[7:0] Port Interrupt Edge Select Bits in the P1 Port Interrupt Edge Select (P1_EDGE)
Register (D[7:0]/0x5216)
Setting PxEDGE[7:0] to 1 generates port input interrupts at the input signal falling edge. Setting it to 0 (default)
generates interrupts at the rising edge.
S1C17001 TECHNICAL MANUAL
Figure 10.7.1: Port input interrupt circuit configuration
EPSON
10 INPUT/OUTPUT PORT (P)
Interrupt flag
P0IF0
P0IF7
P1IF0
P1IF7
P0 port
interrupt
request
(to ITC)
P1 port
interrupt
request
(to ITC)
89

Advertisement

Table of Contents
loading

Table of Contents