0X4324: Spi Receive Data Register (Spi_Rxd) - Epson S1C17001 Technical Manual

0x4324: SPI Receive Data Register (SPI_RXD)

Register name Address Bit
SPI Receive 0x4324 D15–8
Data Register (16 bits)
D7–0
(SPI_RXD)
D[15:8] Reserved
D[7:0] SPRDB[7:0]: SPI Receive Data Buffer Bits
Contain the received data. (Default: 0x0)
SPRBF (D1/SPI_ST register) is set to 1 (data full) as soon as data is received and the shift register data
has been transferred to the receive data buffer. A receive buffer full interrupt is generated at the same
time. Data can then be read until subsequent data is received. If receiving the subsequent data is com-
plete before the register has been read out, the new received data overwrites the contents.
Serial data input from the SDI pin with MSB leading is converted to parallel, with the High level bit set
to 1 and the Low level bit set to 0. The data is the loaded into this register.
This register is read-only.
S1C17001 TECHNICAL MANUAL
Name Function
– reserved
SPRDB[7:0] SPI receive data buffer
SPRDB7 = MSB
SPRDB0 = LSB
EPSON
Setting Init. R/W
– – –
0x0 to 0xff 0x0 R
19 SPI
Remarks
0 when being read.
245