0X530A: Pwm Timer Interrupt Mask Register (T16E_Imsk) - Epson S1C17001 Technical Manual

13 PWM & CAPTURE TIMER (T16E)

0x530a: PWM Timer Interrupt Mask Register (T16E_IMSK)

Register name Address Bit
PWM Timer 0x530a D15–2 –
Interrupt (16 bits)
D1
Mask Register
(T16E_IMSK) D0
D[15:2] Reserved
D1 CBIE: Compare B Interrupt Enable Bit
Permits or prohibits compare B match interrupts.
1 (R/W): Interrupt permitted
0 (R/W): Interrupt prohibited (default)
Setting CBIE to 1 permits compare B interrupt requests to the ITC. Setting it to 0 prohibits interrupts.
The ITC PWM & capture timer interrupt enable bits must also be set to permit interrupts in order to
generate interrupts.
D0 CAIE: Compare A Interrupt Enable Bit
Permits or prohibits compare A match interrupts.
1 (R/W): Interrupt permitted
0 (R/W): Interrupt prohibited (default)
Setting CAIE to 1 permits compare A interrupt requests to the ITC. Setting it to 0 prohibits interrupts.
The ITC PWM & capture timer interrupt enable bits must also be set to permit interrupts in order to
generate interrupts.
158
Name Function
reserved
CBIE Compare B interrupt enable
CAIE Compare A interrupt enable
Setting
–
1 Enable 0 Disable
1 Enable 0 Disable
EPSON
Init. R/W Remarks
– – 0 when being read.
0 R/W
0 R/W
S1C17001 TECHNICAL MANUAL