0X4220-0X4266; 16-Bit Timer - Epson S1C17001 Technical Manual

0x4220–0x4246
Register name Address Bit

16-bit Timer

0x4220 D15–4 –
Ch.0 Input (16 bits)
D3–0 DF[3:0]
Clock Select
Register
(T16_CLK0)
16-bit Timer 0x4222 D15–0 TR[15:0]
Ch.0 Reload (16 bits)
Data Register
(T16_TR0)
16-bit Timer 0x4224 D15–0 TC[15:0]
Ch.0 Counter (16 bits)
Data Register
(T16_TC0)
16-bit Timer 0x4226 D15–11 –
Ch.0 Control (16 bits)
D10
Register
D9–8 CKSL[1:0]
(T16_CTL0)
D7–5 –
D4
D3–2 –
D1
D0
16-bit Timer 0x4240 D15–4 –
Ch.1 Input (16 bits)
D3–0 DF[3:0]
Clock Select
Register
(T16_CLK1)
16-bit Timer 0x4242 D15–0 TR[15:0]
Ch.1 Reload (16 bits)
Data Register
(T16_TR1)
16-bit Timer 0x4244 D15–0 TC[15:0]
Ch.1 Counter (16 bits)
Data Register
(T16_TC1)
16-bit Timer 0x4246 D15–11 –
Ch.1 Control (16 bits)
D10
Register
D9–8 CKSL[1:0]
(T16_CTL1)
D7–5 –
D4
D3–2 –
D1
D0
S1C17001 TECHNICAL MANUAL
Name Function
reserved
Timer input clock select
(Prescaler output clock)
16-bit timer reload data
TR15 = MSB
TR0 = LSB
16-bit timer counter data
TC15 = MSB
TC0 = LSB
reserved
CKACTV External clock active level select
Input clock and pulse width
measurement mode select
reserved
TRMD Count mode select
reserved
PRESER Timer reset
PRUN Timer run/stop control
reserved
Timer input clock select
(Prescaler output clock)
16-bit timer reload data
TR15 = MSB
TR0 = LSB
16-bit timer counter data
TC15 = MSB
TC0 = LSB
reserved
CKACTV External clock active level select
Input clock and pulse width
measurement mode select
reserved
TRMD Count mode select
reserved
PRESER Timer reset
PRUN Timer run/stop control
EPSON
APPENDIX A I/O REGISTER LIST
Setting Init. R/W
–
DF[3:0] Clock 0x0 R/W
0xf reserved
0xe PCLK-1/16384
0xd
PCLK-1/8192
0xc PCLK-1/4096
0xb PCLK-1/2048
0xa PCLK-1/1024
0x9 PCLK-1/512
0x8 PCLK-1/256
0x7 PCLK-1/128
0x6 PCLK-1/64
0x5 PCLK-1/32
0x4 PCLK-1/16
0x3 PCLK-1/8
0x2 PCLK-1/4
0x1 PCLK-1/2
0x0
PCLK-1/1
0x0 to 0xffff 0x0 R/W
0x0 to 0xffff 0x0
–
1 High 0 Low
CKSL[1:0] Mode 0x0 R/W
0x3 reserved
0x2 Pulse width
0x1 External clock
0x0 Internal clock
–
1 One shot 0 Repeat
–
1 Reset 0 Ignored
1 Run 0 Stop
–
DF[3:0] Clock 0x0 R/W
0xf reserved
0xe PCLK-1/16384
0xd PCLK-1/8192
0xc PCLK-1/4096
0xb PCLK-1/2048
0xa PCLK-1/1024
0x9 PCLK-1/512
0x8 PCLK-1/256
0x7 PCLK-1/128
0x6 PCLK-1/64
0x5 PCLK-1/32
0x4 PCLK-1/16
0x3 PCLK-1/8
PCLK-1/4
0x2
0x1 PCLK-1/2
0x0 PCLK-1/1
0x0 to 0xffff 0x0 R/W
0x0 to 0xffff 0x0
–
1 High 0 Low
CKSL[1:0] Mode 0x0 R/W
0x3 reserved
0x2 Pulse width
0x1 External clock
0x0 Internal clock
–
1 One shot 0 Repeat
–
1 Reset 0 Ignored
1 Run 0 Stop
16-bit Timer
Remarks
– – 0 when being read.
R
– – 0 when being read.
1 R/W
– – 0 when being read.
0 R/W
– – 0 when being read.
0 W
0 R/W
– – 0 when being read.
R
– – 0 when being read.
1 R/W
– – 0 when being read.
0 R/W
– – 0 when being read.
0 W
0 R/W
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