8-Bit Osc1 Timer Run/Stop Control - Epson S1C17001 Technical Manual

14 8-BIT OSC1 TIMER (T8OSC1)

14.6 8-bit OSC1 Timer RUN/STOP Control

Set the following items before starting the 8-bit OSC1 timer.
(1) Set the count mode (One-shot or Repeat). See Section 14.2.
(2) Select the operation clock. See Section 14.3.
(3) If using interrupts, set the interrupt level and permit interrupts for the 8-bit OSC1 timer. See Section 14.7.
(4) Reset the timer. See Section 14.4.
(5) Set the compare data. See Section 14.5.
The 8-bit OSC1 timer includes T8ORUN (D0/T8OSC1_CTL register) to control Run/Stop.
∗ T8ORUN: Timer Run/Stop Control Bit in the 8-bit OSC1 Timer Control (T8OSC1_CTL) Register (D0/0x50c0)
The timer starts counting when T8ORUN is written as 1. Writing 0 to T8ORUN prevents clock input and stops the
count.
This control does not affect the counter data. The counter data is retained even when the count is halted, allowing
resumption of the count from that data.
If T8ORUN and T8ORST are written as 1 simultaneously, the timer starts counting after the reset.
If the counter matches the compare data register setting during counting, a compare match signal is output and a
compare interrupt factor generated.
Likewise, if the counter matches the compare data B register setting, a compare B match signal is output and a
compare B interrupt factor generated. The counter is reset to 0 at the same time.
If interrupts are permitted, an interrupt request is sent to the interrupt controller (ITC).
If One-shot mode is set, the timer stops the count.
If Repeat mode is set, the timer continues to count from 0.
One-shot mode
T8ORUN
T8ORST
T8OCMP
Input clock
T8OCNT
Reset
Repeat mode
T8ORUN
T8ORST
T8OCMP
Input clock
T8OCNT
Reset
166
0 1 2 3 4
compare match interrupt
0 1 2 3 4
compare match interrupt
Figure 14.6.1: Basic counter operation timing
EPSON
0x5
5 0
Reset &
0x5
5 0 1 2 3
Reset &
compare match interrupt
4 5 0 1
Reset &
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