0X5062: Noise Filter Enable Register (Osc_Nfen) - Epson S1C17001 Technical Manual

0x5062: Noise Filter Enable Register (OSC_NFEN)

Register name Address Bit
Noise Filter 0x5062 D7–2 –
Enable Register (8 bits)
D1
(OSC_NFEN)
D0
D1 RSTFE: Reset Noise Filter Enable Bit
Enables or disables the RESET input noise filter.
1 (R/W): Enabled (noise filtering) (default)
0 (R/W): Disabled (bypass)
This noise filter inputs only RESET pulses of not less than 16 cycles of the system clock (OSC3 or
OSC1 clock) to the S1C17 core. Pulses having widths of less than 16 cycles are filtered out as noise.
This should normally be enabled.
D0 NMIFE: NMI Noise Filter Enable Bit
Enables or disables the NMI input noise filter.
1 (R/W): Enabled (noise filtering) (default)
0 (R/W): Disabled (bypass)
This noise filter inputs only NMI pulses of not less than 16 cycles of the system clock (OSC3 or OSC1
clock) to the S1C17 core. Pulses having widths of less than 16 cycles are filtered out as noise. This
should normally be enabled.
Note: The S1C17001 does not feature external NMI input pins, but the watchdog timer NMI request
signal passes through these filters.
S1C17001 TECHNICAL MANUAL
Name Function
reserved
RSTFE Reset noise filter enable
NMIFE NMI noise filter enable
EPSON
7 OSCILLATOR CIRCUIT (OSC)
Setting Init. R/W
–
1 Enable 0 Disable
1 Enable 0 Disable
Remarks
– – 0 when being read.
1 R/W
1 R/W
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