Bcd Counters - Epson S1C17001 Technical Manual

Cmos 16-bit single chip microcontroller
Table of Contents

Advertisement

16 STOPWATCH TIMER (SWT)

16.2 BCD Counters

The stopwatch counter consists of 1/100-second and 1/10-second 4-bit BCD counters.
The count value can be read from the SWT_BCNT register.
1/100-second counter
∗ BCD100[3:0]: 1/100 Sec. BCD Counter Value in the Stopwatch Timer BCD Counter (SWT_BCNT) Register
(D[3:0]/0x5021)
1/10-second counter
∗ BCD10[3:0]: 1/10 Sec. BCD Counter Value in the Stopwatch Timer BCD Counter (SWT_BCNT) Register
(D[7:4]/0x5021)
Count-up Pattern
A feedback division circuit is used to generate 100 Hz, 10 Hz, and 1 Hz signals from the 256 Hz clock. The
counter count-up pattern varies as shown in Figure 16.2.1.
256Hz
3
256
Approximate 100 Hz
(Feedback division circuit output)
1/100-second counter
0
Approximate 10 Hz
(1/100-second counter output)
26
256
Approximate 10 Hz
(1/100-second counter output)
1/10-second counter
1Hz
(1/10-second counter output)
The feedback division circuit generates an approximate 100 Hz signal at 2/256-second and 3/256-second inter-
vals from the 256 Hz signal fed from the OSC module.
The 1/100-second counter counts the approximate 100 Hz signal output by the feedback division circuit and
generates an approximate 10 Hz signal at 25/256-second and 26/256-second intervals.
Count-up will be pseudo 1/100-second counting at 2/256-second and 3/256-second intervals.
The 1/10-second counter counts the approximate 10 Hz signal generated by the 1/100-second counter at a ratio
of 4:6, and generates a 1 Hz signal.
Count-up will be pseudo 1/10-second counting at 25/256-second and 26/256-second intervals.
190
1/100-second counter count-up pattern 1
2
3
2
3
2
256
256
256
256
256
256
1
2
3
4
5
25
seconds
256
26
25
25
seconds
seconds
seconds
256
256
256
0
1
2
Figure 16.2.1: Stopwatch timer count-up patterns
3
2
3
2
3
3
256
256
256
256
256
6
7
8
9
0
1
1/10-second counter count-up pattern
26
26
seconds
seconds
seconds
256
256
3
4
5
26
× 6 + 25
× 4 = 1
second
256
256
EPSON
1/100-second counter count-up pattern 2
3
2
3
2
3
256
256
256
256
256
256
2
3
4
5
6
26
seconds
256
25
25
26
seconds
seconds
seconds
256
256
256
6
7
8
S1C17001 TECHNICAL MANUAL
2
3
2
256
256
7
8
9
26
seconds
256
9

Advertisement

Table of Contents
loading

Table of Contents