APPENDIX A I/O REGISTER LIST
0x5320–0x5322
Register name Address
Bit
ROM
0x5320
D7–3 –
Control Register
(8 bits)
D2–0 FLCYC[2:0] ROM read access cycle
(MISC_FL)
OSC1 Peripheral
0x5322
D7–1 –
Control Register
(8 bits)
D0
(MISC_OSC1)
326
Name
Function
reserved
reserved
O1DBG
OSC1 peripheral control in debug
mode
Setting
–
FLCYC[2:0]
Read cycle
0x7–0x5
0x4
0x3
0x2
0x1
0x0
–
1 Run
0 Stop
EPSON
MISC Registers
Init. R/W
Remarks
–
–
0 when being read.
0x3 R/W
reserved
1 cycle
5 cycles
4 cycles
3 cycles
2 cycles
–
–
0 when being read.
0
R/W
S1C17001 TECHNICAL MANUAL