0X4322: Spi Transmit Data Register (Spi_Txd) - Epson S1C17001 Technical Manual

19 SPI

0x4322: SPI Transmit Data Register (SPI_TXD)

Register name Address Bit
SPI Transmit 0x4322 D15–8 –
Data Register (16 bits)
D7–0 SPTDB[7:0] SPI transmit data buffer
(SPI_TXD)
D[15:8] Reserved
D[7:0] SPTDB[7:0]: SPI Transmit Data Buffer Bits
Set the transmission data to be written to the transmit data buffer. (Default: 0x0)
In Master mode, transmission is started by writing data to this register. In Slave mode, the contents of
this register are sent to the shift register and transmission begins when the clock is input from the mas-
ter.
SPTBE (D0/SPI_ST register) is set to 1 (empty) as soon as data written to this register has been trans-
ferred to the shift register. A transmit buffer empty interrupt is generated at the same time. The subse-
quent transmit data can then be written, even while data is being transmitted.
Serial converted data is output from the SDO pin with MSB leading, with the bit set to 1 as High level
and the bit set to 0 as Low level.
244
Name Function
reserved
SPTDB7 = MSB
SPTDB0 = LSB
EPSON
Setting Init. R/W
– – –
0x0 to 0xff 0x0 R/W
S1C17001 TECHNICAL MANUAL
Remarks
0 when being read.