Epson Arm S1C31 Series Technical Manual page 392

APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
0x0020 0480–0x0020 048c
Address Register name
0x0020 T16_3CLK
0480 (T16 Ch.3 Clock
Control Register)
0x0020 T16_3MOD
0482 (T16 Ch.3 Mode
Register)
0x0020 T16_3CTL
0484 (T16 Ch.3 Control
Register)
0x0020 T16_3TR
0486 (T16 Ch.3 Reload
Data Register)
0x0020 T16_3TC
0488
(T16 Ch.3 Counter
Data Register)
0x0020 T16_3INTF
048a
(T16 Ch.3 Interrupt
Flag Register)
0x0020 T16_3INTE
048c (T16 Ch.3 Interrupt
Enable Register)
0x0020 04a0–0x0020 04ac
Address Register name
0x0020 T16_4CLK
04a0
(T16 Ch.4 Clock
Control Register)
0x0020 T16_4MOD
04a2
(T16 Ch.4 Mode
Register)
0x0020 T16_4CTL
04a4 (T16 Ch.4 Control
Register)
0x0020 T16_4TR
04a6
(T16 Ch.4 Reload
Data Register)
0x0020 T16_4TC
04a8 (T16 Ch.4 Counter
Data Register)
0x0020 T16_4INTF
04aa (T16 Ch.4 Interrupt
Flag Register)
0x0020 T16_4INTE
04ac
(T16 Ch.4 Interrupt
Enable Register)
AP-A-30
Bit Bit name
15–9 –
8 DBRUN
7–4 CLKDIV[3:0]
3–2 –
1–0 CLKSRC[1:0]
15–8 –
7–1 –
0 TRMD
15–9 –
8 PRUN
7–2 –
1 PRESET
0 MODEN
15–0 TR[15:0]
15–0 TC[15:0]
15–8 –
7–1 –
0 UFIF
15–8 –
7–1 –
0 UFIE
Bit Bit name
15–9 –
8 DBRUN
7–4 CLKDIV[3:0]
3–2 –
1–0 CLKSRC[1:0]
15–8 –
7–1 –
0 TRMD
15–9 –
8 PRUN
7–2 –
1 PRESET
0 MODEN
15–0 TR[15:0]
15–0 TC[15:0]
15–8 –
7–1 –
0 UFIF
15–8 –
7–1 –
0 UFIE
Seiko Epson Corporation
16-bit Timer (T16) Ch.3
Initial Reset R/W
0x00 – R
0 H0 R/W
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0 H0 R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0xffff H0 R/W
0xffff H0 R
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
16-bit Timer (T16) Ch.4
Initial Reset R/W
0x00 – R
0 H0 R/W
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0 H0 R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0xffff H0 R/W
0xffff H0 R
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
S1C31D41 TECHNICAL MANUAL
Remarks
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Cleared by writing 1.
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Remarks
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Cleared by writing 1.
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(Rev. 1.1)