External Qspi Flash Memory Access - Epson Arm S1C31 Series Technical Manual

Cmos 32-bit single chip microcontroller
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Terminating memory check
The following shows the procedure to terminate the memory check being executed.
1. Confirm that the STATE.STATE[15:0] bits = 0x0002 to 0x0005 (during memory check).
2. Confirm that the STATUS.READY bit = 1.
3. Set the COMMAND.COMMAND[7:0] bits to 0xff.
4. Write 1 to the HWPCMDTRG.HWP0TRG bit.
5. Wait until the HWPINTF.HWP0IF bit is set to 1 (interrupt).
6. Confirm that the STATE.STATE[15:0] bits = 0x0001 (mc_state_idle).
7. Write 0 to the HWPINTF.HWP0IF bit.
Memory check error
When an error occurs during processing of the Memory Check function, the HWPINTF.HWP1IF bit is set to 1 (an
interrupt can be generated). The error contents can be confirmed by reading the ERROR.ERROR[15:0] bits. As
shown in Table 22.4.2.2, the ERROR.ERRORx bit corresponding to the error that has occurred is set to 1.
ERROR.ERROR[15:0] bits
0000 0000 0000 0000
Non-fatal error
xxxx xxxx xxxx xxx1 (bit 0) error_command
Fatal error
x1xx xxxx xxxx xxxx (bit 14) error_function_id
1xxx xxxx xxxx xxxx (bit 15) error_others
When a non-fatal error has occurred, reissue a valid command.
When a fatal error has occurred, remove the cause of error and redo the processing from initialization.

22.4.3 External QSPI Flash Memory Access

Initialization
When accessing an external QSPI Flash memory through the HWP function, set it into memory mapped access
mode as in the procedure below before performing the initialization described in Section 22.4.1 or 22.4.2.
1. Perform Steps 1 to 6 described in Section 15.5.3.
However, a part of Steps 3 and 6 must be changed as follows:
- In Step 3, set the QSPI_nMB.XIPEXT[7:0] bits to the same value as the QSPI_nMB.XIPACT[7:0] bits.
- In Step 6, set the interrupt enable bits in the QSPI_nINTE register to 0 (interrupt disabled).
2. Perform Steps 1 to 3 described in Section 15.5.6.
End processing
When switching the QSPI from memory mapped access mode to register access mode after the HPW function
has been completed, follow the procedure below to terminate the memory mapped access.
1. Before disabling the HWP, set the mode byte for terminating the XIP session to the QSPI_nMB.XI-
PEXT[7:0] bits.
2. Disable the HWP.
3. Perform the procedure described in Section 15.5.7.
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
Table 22.4.2.2 List of Memory Check Errors
Error
error_no_error
No error has occurred.
A command that is undefined or is ineffective in the cur-
rent state has been specified.
An undefined function ID has been specified.
Another error has occurred.
Seiko Epson Corporation
22 HW Processor (HWP) and Sound Output (SDAC2)
(Command acceptable)
(Select Memory Check Stop command)
(Trigger to issue command)
(Occurrence of state transition)
(Clear interrupt flag)
Meaning
22-17

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