0X0020 00A0-0X0020 00A4 Watchdog Timer (Wdt2); 0X0020 00C0-0X0020 00D2 Real-Time Clock (Rtca) - Epson Arm S1C31 Series Technical Manual

0x0020 00a0–0x0020 00a4
Address Register name
0x0020 WDT2CLK
00a0 (WDT2 Clock Control
Register)
0x0020 WDT2CTL
00a2 (WDT2 Control
Register)
0x0020 WDT2CMP
00a4
(WDT2 Counter Com-
pare Match Register)
0x0020 00c0–0x0020 00d2
Address Register name
0x0020 RTCACTLL
00c0 (RTCA Control
Register (Low Byte))
0x0020 RTCACTLH
00c1 (RTCA Control
Register (High Byte))
0x0020 RTCAALM1
00c2 (RTCA Second Alarm
Register)
0x0020 RTCAALM2
00c4 (RTCA Hour/Minute
Alarm Register)
0x0020 RTCASWCTL
00c6 (RTCA Stopwatch
Control Register)
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Bit Bit name
15–9 –
8 DBRUN
7–6 –
5–4 CLKDIV[1:0]
3–2 –
1–0 CLKSRC[1:0]
15–11 –
10–9 MOD[1:0]
8 STATNMI
7–5 –
4 WDTCNTRST
3–0 WDTRUN[3:0]
15–10 –
9–0 CMP[9:0]
Bit Bit name
7 –
6 RTCBSY
5 RTCHLD
4 RTC24H
3 –
2 RTCADJ
1 RTCRST
0 RTCRUN
7 RTCTRMBSY
6–0 RTCTRM[6:0]
15 –
14–12 RTCSHA[2:0]
11–8 RTCSLA[3:0]
7–0 –
15 –
14 RTCAPA
13–12 RTCHHA[1:0]
11–8 RTCHLA[3:0]
7 –
6–4 RTCMIHA[2:0]
3–0 RTCMILA[3:0]
15–12 BCD10[3:0]
11–8 BCD100[3:0]
7–5 –
4 SWRST
3–1 –
0 SWRUN
Seiko Epson Corporation
Watchdog Timer (WDT2)
Initial Reset R/W
0x00 – R
0 H0 R/WP
0x0 – R
0x0 H0 R/WP
0x0 – R
0x0 H0 R/WP
0x00 – R
0x0 H0 R/WP
0 H0 R
0x0 – R
0 H0 WP
0xa H0 R/WP –
0x00 – R
0x3ff H0 R/WP
Real-time Clock (RTCA)
Initial Reset R/W
0 – R
0 H0 R
0 H0 R/W
0 H0 R/W
0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R
0x00 H0 W
0 – R
0x0 H0 R/W
0x0 H0 R/W
0x00 – R
0 – R
0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0 – R
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R
0x0 H0 R
0x0 – R
0 H0 W
0x0 – R
0 H0 R/W
Remarks
–
–
Always read as 0.
–
Remarks
–
Cleared by setting the
RTCACTLL.RTCRST bit to 1.
–
Cleared by setting the
RTCACTLL.RTCRST bit to 1.
–
–
Read as 0x00.
–
–
–
Read as 0.
–
AP-A-3