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19 12-BIT A/D CONVERTER (ADC12A)
Trigger inputs can be accepted while the ADC12A_nCTL.BSYSTAT bit is set to 0 and are ignored while set to 1.
A/D conversion is actually started in sync with CLK_T16_k after a trigger is accepted.
Writing 0 to the ADC12A_nCTL.ADST bit stops A/D conversion after the one currently being executed has com-
pleted.
19.4.3 Conversion Mode and Analog Input Pin Settings
The ADC12A can be put into two conversion modes shown below using the ADC12A_nTRG.CNVMD bit. Each
mode allows setting of analog input pin range to be A/D converted. The analog input pin range can be set using the
ADC12A_nTRG.STAAIN[2:0] bits for specifying the first analog input pin and the ADC12A_nTRG.ENDAIN[2:0]
bits for specifying the last analog input pin. The analog input signals within the specified range are A/D converted
successively in ascending order of the pin numbers.
One-time conversion mode
Once the ADC12A executes A/D conversion for all the analog input signals within the specified range, it is au-
tomatically stopped.
Continuous conversion mode
The ADC12A repeatedly executes A/D conversion within the specified range until 0 is written to the ADC12A_
nCTL.ADST bit.
19.4.4 A/D Conversion Operations and Control Procedures
The following shows A/D conversion control procedures and the ADC12A operations.
Control procedure in one-time conversion mode
1. Write 1 to the ADC12A_nCTL.ADST bit.
2. Wait for an ADC12A interrupt.
i. If the ADC12A_nINTF.ADmCIF bit = 1 (analog input signal m A/D conversion completion interrupt), clear
the ADC12A_nINTF.ADmCIF bit and then go to Step 3.
ii. If the ADC12A_nINTF.OVIF bit = 1 (A/D conversion result overwrite error interrupt), clear the ADC12A_
nINTF.OVIF bit and terminate as an error or retry A/D conversion.
3. Read the A/D conversion result of the analog input m (ADC12A_nADD.ADD[15:0] bits).
The 12-bit conversion results are located at the low-order 12 bits or high-order 12-bits within the ADC12A_
*
nADD.ADD[15:0] bits according to the ADC12A_nTRG.STMD bit setting.
4. Repeat Steps 2 and 3 until A/D conversion for all the analog input pins within the specified range is completed.
5. To forcefully terminate the A/D conversion being executed, write 0 to the ADC12A_nCTL.ADST bit.
The ADC12A stops operating after the A/D conversion currently being executed has completed.
The ADC12A_nCTL.ADST bit must be cleared by writing 0 even if A/D conversion is completed and auto-
matically stopped.
Control procedure in continuous conversion mode
1. Write 1 to the ADC12A_nCTL.ADST bit.
2. Wait for an ADC12A interrupt.
i. If the ADC12A_nINTF.ADmCIF bit = 1 (analog input signal m A/D conversion completion interrupt), clear
the ADC12A_nINTF.ADmCIF bit and then go to Step 3.
ii. If the ADC12A_nINTF.OVIF bit = 1 (A/D conversion result overwrite error interrupt), clear the ADC12A_
nINTF.OVIF bit and terminate as an error or retry A/D conversion.
3. Read the A/D conversion result of the analog input m (ADC12A_nADD.ADD[15:0] bits).
4. Repeat Steps 2 and 3 until terminating A/D conversion.
5. Write 0 to the ADC12A_nCTL.ADST bit.
The ADC12A stops operating after the A/D conversion currently being executed has completed.
19-4
Seiko Epson Corporation
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
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