Epson Arm S1C31 Series Technical Manual page 406

APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Address Register name
0x0020 SDAC2CTL
0862 (SDAC2 Control
Register)
0x0020 SDAC2MOD
0864 (SDAC2 Mode
Register)
0x0020 SDAC2_0DAT
0866 (SDAC2 Ch.0 Data
Register)
0x0020 SDAC2INTF
0868
(SDAC2 Interrupt Flag
Register)
0x0020 SDAC2INTE
086a (SDAC2 Interrupt
Enable Register)
0x0020 SDAC2RESAMP
0870 (SDAC2 Resampler
Rate Register)
0x0020 SDAC2TONE
0878 (SDAC2 Tone Divider
Register)
0x0020 SDAC2_1DAT
087e (SDAC2 Ch.1 Data
Register)
0x0020 08a0–0x0020 08a8
Address Register name
0x0020 HWPCTL
08a2
(HWP Control
Register)
0x0020 HWPINTF
08a4 (HWP Interrupt Flag
Register)
0x0020 HWPINTE
08a6 (HWP Interrupt
Enable Register)
0x0020 HWPCMDTRG
08a8
(HWP Command Trig-
ger Register)
AP-A-44
Bit Bit name
15–8 –
7–4 –
3 TONEON
2 –
1 RESAMPEN
0 SDACEN
15–9 –
8 PWMOUTEN
7–2 –
1–0 PWMMODE[1:0]
15–10 –
9–0 DAT[9:0]
15–8 –
7–4 –
3 ERR1IF
2 DATREQ1IF
1 ERR0IF
0 DATREQ0IF
15–8 –
7–2 –
3 ERR1IE
2 DATREQ1IE
1 ERR0IE
0 DATREQ0IE
15–11 –
10–0 RESAMPRATE[10:0]
15–0 TONEDIV[15:0]
15–10 –
9–0 DAT[9:0]
Bit Bit name
15–8 –
7–1 –
0 HWPEN
15–8 –
7–2 –
1 HWP1IF
0 HWP0IF
15–8 –
7–1 –
0 HWPIE
15–8 –
7–1 –
0 HWP0TRG
Seiko Epson Corporation
Initial Reset R/W
0x00 – R
0x00 – R
0 H0 R/W
0 – R
0 H0 R/W
0 H0 R/W
0x00 – R
0 H0 R/W
0x00 H0 R
0x00 H0 R/W
0x00 – R
0x000 H0 R/W
0x00 – R
0x0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x00 – R
0x400 H0 R/W
0x4000 H0 R/W
0x00 – R
0x000 H0 R/W
Initial Reset R/W
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
Remarks
–
–
–
–
Cleared by writing 1.
–
–
–
–
HW Processor (HWP)
Remarks
–
–
Cleared by writing 0.
–
–
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)