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Example) REMC3APLEN.APLEN[15:0] bits = 0x0bd0, REMC3DBLEN.DBLEN[15:0] bits = 0x11b8,
REMC3DBCTL.TRMD bit = 0 (repeat mode), REMC3DBCTL.REMOINV bit = 0 (signal logic non-invert-
ed)
REMC3DBCTL.PRUN
16-bit counter for
data signal generation
0
(DBCNT[15:0])
REMC3INTF.APIF
Compare AP interrupt
REMC3INTF.DBIF
Compare DB interrupt
Data signal
(Modulated data)
The data length and duty ratio of the pulse-width-modulated data signal can be calculated with the equations
shown below.
DBLEN + 1
Data length = — — — — — — — —
f
CLK_REMC3
Where
f
: CLK_REMC3 frequency [Hz]
CLK_REMC3
DBLEN:
REMC3DBLEN.DBLEN[15:0] bit-setting value (1–65,535)
APLEN:
REMC3APLEN.APLEN[15:0] bit-setting value (0–65,534)
* REMC3APLEN.APLEN[15:0] bits < REMC3DBLEN.DBLEN[15:0] bits
The 16-bit counter for data signal generation is reset by the REMC3DBCTL.PRESET bit and is started/
stopped by the REMC3DBCTL.PRUN bit. When the counter value is matched with the REMC3APLEN.
APLEN[15:0] bits (compare AP), the data signal waveform is inverted. When the counter value is matched with
the REMC3DBLEN.DBLEN[15:0] bits (compare DB), the data signal waveform is inverted and the counter is
reset to 0x0000.
A different interrupt can be generated when the counter value is matched with the REMC3DBLEN.
DBLEN[15:0] and REMC3APLEN.APLEN[15:0] bits, respectively.
Repeat mode and one-shot mode
When the 16-bit counter for data signal generation is set to repeat mode (REMC3DBCTL.TRMD bit = 0),
the counter keeps operating until it is stopped using the REMC3DBCTL.PRUN bit. When the counter is set
to one-shot mode (REMC3DBCTL.TRMD bit = 1), the counter stops automatically when the counter value
is matched with the REMC3DBLEN.DBLEN[15:0] bit-setting value.
18.4.4 Continuous Data Transmission and Compare Buffers
Figure 18.4.4.1 shows an operation example of continuous data transmission with the compare buffer enabled.
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
0x0bd0
1 2 3 4
A
B
Figure 18.4.3.3 Example of Data Signal Generated
Seiko Epson Corporation
18 IR REMOTE CONTROLLER (REMC3)
0x0bd1
0x11b8
0
1
2 3 4
A: REMC3APLEN.APLEN[15:0] bits + 1 [clock]
B: REMC3DBLEN.DBLEN[15:0] bits + 1 [clock]
APLEN + 1
Duty ratio = — — — — — — — —
DBLEN + 1
0x0bd0
0x0bd1
(Eq. 18.2)
18-5
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