Adclk Adclk Adclk; Sampling Rate [Sps] - Epson S1C17624 Technical Manual

Cmos 16-bit single chip microcontroller
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24
A/D Converter (ADC10)
24.1
aDC10 Module Overview
The S1C17624/604/622/602/621 includes an A/D converter (ADC10) that converts analog input signals into 10-bit
digital values.
The following shows the features of the ADC10 module:
• Conversion method:
• Resolution:
• Input channels:
• A/D conversion clock:
• Sampling rate:
• Analog input voltage range:
• Sampling & hold circuit included
• Supports two conversion modes:
• Supports three conversion triggers:
• The conversion results can be read as 16-bit data with the 10-bit converted data aligned to left or right.
• Two types of interrupts can be generated: Conversion completion interrupt
Figure 24.1.1 shows the ADC10 configuration.
AV
DD
AIN7
AIN6
AIN5
AIN4
AIN3
AIN2
AIN1
AIN0
External trigger
#ADTRG
T16 Ch.0
S1C17624/604/622/602/621 TeChniCal Manual
Successive approximation type
10 bits
Max. 8 channels
Max. 2 MHz
f
/13 to f
ADCLK
V
to AV
SS
One-time conversion mode
(for single channel or multi-channels)
Continuous conversion mode
(for single channel or multi-channels, terminated with software)
Software trigger
External trigger (input from the #ADTRG pin)
T16 Ch.0 underflow trigger
Conversion data overwrite error interrupt
PCLK
CLG
Multi-
plexer
ITC
Figure 24.
1.1 A/D Converter Configuration
Seiko epson Corporation
/20 [sps] (f
ADCLK
ADCLK
(= V
)
DD
DD
Divider
(1/2–1/32K)
Successive
+
approximation
control circuit
D/A
converter
Trigger signals
Interrupt request
24 a/D COnVeRTeR (aDC10)
: A/D conversion clock frequency)
ADC10
ADCLK
Bus I/F
and
control
registers
24-1

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