Epson S1C17624 Technical Manual page 53

6 Interrupt Controller (ITC)
6.1 iTC Module Overview
The interrupt controller (ITC) honors interrupt requests from the peripheral modules and outputs the interrupt re-
quest, interrupt level and vector number signals to the S1C17 Core according to the priority and interrupt levels.
The features of the ITC module are listed below.
• Supports 20 maskable interrupt systems (for 23 interrupt sources listed below).
1. P0 port (P00–P07) interrupt (8 types)
2. P1 port (P10–P17) interrupt (8 types)
3. Stopwatch timer (SWT) interrupt (3 types)
4. Clock timer (CT) interrupt (4 types)
5. Real-time clock (RTC) interrupt (1 type) (available only for S1C17624/604)
6. 8-bit OSC1 timer (T8OSC1) interrupt (1 type)
7. Supply voltage detector (SVD) interrupt (1 type)
8. LCD driver (LCD) interrupt (1 type)
9. 16-bit PWM timer (T16E) Ch.0 interrupt (2 types)
10. 16-bit PWM timer (T16A2) Ch.0 interrupt (6 types) (available only for S1C17624/604)
11. 16-bit PWM timer (T16A2) Ch.1 interrupt (6 types) (available only for S1C17624/604)
12. 8-bit timer (T8F) Ch.0 & Ch.1 interrupt (2 types)
13. 16-bit timer (T16) Ch.0 interrupt (1 type)
14. 16-bit timer (T16) Ch.1 interrupt (1 type)
15. 16-bit timer (T16) Ch.2 interrupt (1 type)
16. UART Ch.0 interrupt (3 types)
17. UART Ch.1 interrupt (3 types)
18. IR remote controller (REMC) interrupt (3 types)
19. SPI Ch.0 interrupt (2 types)
2
20. I C master (I2CM) interrupt (2 types)
2
21. I C slave (I2CS) interrupt (3 types)
22. A/D converter (ADC10) interrupt (2 types)
23. R/F converter (RFC) interrupt (5 types)
• Supports eight interrupt levels to prioritize the interrupt sources.
The ITC enables the interrupt level (priority) for determining the processing sequence when multiple interrupts oc-
cur simultaneously to be set for each interrupt system separately.
Each interrupt system includes the number of interrupt causes indicated in parentheses above. Settings to enable or
disable interrupt for different causes are set by the respective peripheral module registers.
For specific information on interrupt causes and their control, refer to the peripheral module explanations.
Figure 6.1.1 shows the structure of the interrupt system.
notes: • After the S1C17622 power is turned on, write the specified values to the addresses shown be-
low before executing the interrupt enable (ei) instruction.
1. Address 0x5140 = 0x01 (in 8-bit access)
2. Address 0x5141 = 0x06 (in 8-bit access)
• After the S1C17624/604 power is turned on, clear the RTC interrupt flag and then disable RTC
interrupts as shown below before executing the interrupt enable (ei) instruction.
1. RTCIRQ/RTC_INTSTAT register = 1 (clear RTC interrupt flag)
2. RTCIEN/RTC_INTMODE register = 0 (disable RTC interrupt)
S1C17624/604/622/602/621 TeChniCal Manual
Seiko epson Corporation
6 inTeRRuPT COnTROlleR (iTC)
6-1