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7.7
Clock external Output (FOuTh, FOuT1)
A divided HSCLK (IOSC/OSC3) clock or the OSC1 clock can be output to external devices.
clock
HSCLK
clock
OSC1
There are two output systems available: FOUTH and FOUT1.
Output pin setting
The FOUTH and FOUT1 output pins are shared with I/O ports. The pin is configured for the I/O port by de-
fault, so the pin function should be changed using the port function select bit before the clock output can be
used. See the "I/O Ports (P)" chapter for the FOUTH/FOUT1 pins and selecting pin functions.
FOuTh output control
FOUTH is a divided HSCLK (IOSC or OSC3) clock.
FOuTh clock frequency selection
Three different clock output frequencies can be selected. Select the division ratio for the HSCLK clock us-
ing FOUTHD[1:0]/OSC_FOUT register.
Clock output control
The clock output is controlled using FOUTHE/OSC_FOUT register. Setting FOUTHE to 1 outputs the
FOUTH clock from the FOUTH pin. Setting it to 0 disables output.
FOuT1 output
FOUT1 is the OSC1 clock.
Clock output control
The clock output is controlled using FOUT1E/OSC_FOUT register. Setting FOUT1E to 1 outputs the
FOUT1 clock from the FOUT1 pin. Setting it to 0 disables output.
note: Since the FOUTH/FOUT1 signal is not synchronized with FOUTHE/FOUT1E writing, switching
output on or off will generate certain hazards.
S1C17624/604/622/602/621 TeChniCal Manual
Divider
(1/1–1/4)
Division ratio selection
Figure 7.
7.1 Clock Output Circuit
Table 7.
7.1 FOUTH clock (HSCLK Division Ratio) Selection
FOuThD[1:0]
0x3
0x2
0x1
0x0
FOUTHE
0
FOUTH output
Figure 7.
7.2 FOUTH Output
FOUT1E
0
FOUT1 output
Figure 7.
7.3 FOUT1 Output
Seiko epson Corporation
FOUTH
I/O port (FOUTH pin)
output circuit
On/Off control
FOUT1
I/O port (FOUT1 pin)
output circuit
On/Off control
Division ratio
Reserved
1/4
1/2
1/1
(Default: 0x0)
1
0
1
0
7 ClOCK GeneRaTOR (ClG)
7-9
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