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If you detect potential noise-induced malfunctions while observing the waveform with an oscilloscope, recheck
with a low-impedance (less than 1 kW) resistor connecting the relevant pin to GND or to the power supply.
Malfunctions at that pin are likely if changes are visible, such as the malfunction disappearing, becoming less
frequent, or the phenomena changing.
The DSIO and #RESET input circuits described above detect input signal edges and are susceptible to malfunc-
tions induced by spike noise. This makes these digital signal pins the most susceptible to noise.
To reduce potential noise, keep the following two points in mind when designing circuit boards:
(A) It is important to lower the signal-driving impedance, as described above. Connect pins to the power supply
or GND, with impedance of 1 kW or less, preferably 0 W. The signal lines connected should be no longer
than approximately 5 mm.
(B) Parallel routing of signal lines with other digital lines on the board is undesirable, since the noise generated
when the signal changes from High to Low or vice versa may adversely affect the digital lines. The sig-
nal may be subject to the most noise when signal lines are laid between multiple signal lines whose states
change simultaneously. Take corrective measures by shortening the parallel distance (to several cm) or
separating signal lines (2 mm or more).
handling of light (for bare chip mounting)
The characteristics of semiconductor components can vary when exposed to light. ICs may malfunction or non-
volatile memory data may be corrupted if ICs are exposed to light.
Consider the following precautions for circuit boards and products in which this IC is mounted to prevent IC
malfunctions attributable to light exposure.
(1) Design and mount the product so that the IC is shielded from light during use.
(2) Shield the IC from light during inspection processes.
(3) Shield the IC on the upper, underside, and side faces of the IC chip.
(4) Mount the IC chip within one week of opening the package. If the IC chip must be stored before mounting,
take measures to ensure light shielding.
(5) Adequate evaluations are required to assess nonvolatile memory data retention characteristics before prod-
uct delivery if the product is subjected to heat stress exceeding regular reflow conditions during mounting
processes.
unused pins
(1) I/O port (P) pins
Unused pins should be left open. The control registers should be fixed at the initial status (input with pull-
up enabled).
(2) OSC1, OSC2, OSC3, and OSC4 pins
If the OSC1 oscillator circuit is not used, the OSC1 and OSC2 pins should be left open. If the OSC3 oscil-
lator circuit is not used, the OSC3 and OSC4 pins must be configured as I/O port pins. The control registers
should be fixed at the initial status (oscillation disabled).
(3) V
, CA, CB, SEGx, and COMx pins
C1–3
If the LCD driver is not used, these pins should be left open. The control registers should be fixed at the
initial status (display off). The unused SEGx and COMx pins that are not required to connect should be left
open even if the LCD driver is used.
S1C17624/604/622/602/621 TeChniCal Manual
Seiko epson Corporation
aPPenDiX C MOunTinG PReCauTiOnS
aP-C-3
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