Epson S1C17624 Technical Manual page 40

3 MeMORY MaP
0xff ffff
Reserved for core I/O area
(1K bytes, 1 cycle)
0xff fc00
0xff fbff
0x02 8000
0x02 7fff
Flash Protect area ∗2
0x02 7ffc
0x02 7ffb
0x01 8000
0x01 7fff
(64K bytes, 1–5 cycles)
(Device size: 16 bits)
0x00 8000
0x00 7fff
0x00 6000
0x00 5fff
Internal peripheral area 2
(4K bytes, 1 cycle)
0x00 5000
0x00 4fff
0x00 4400
0x00 43ff
Internal peripheral area 1
(1K bytes, 1 cycle)
0x00 4000
0x00 3fff
0x00 1000
0x00 0fff
Debug RAM area (64 bytes) ∗1
0x00 0fc0
Internal RAM area
(4K bytes, 1 cycle)
(Device size: 32 bits)
0x00 0000
*1: The address range from 0x000fc0 to 0x000fff of the S1C17622 is an internal RAM area.
*2: The address range from 0x027ffc to 0x027fff of the S1C17602 is a reserved area.
0xff ffff
Reserved for core I/O area
(1K bytes, 1 cycle)
0xff fc00
0xff fbff
0x01 8000
0x01 7fff
Flash Protect area
0x01 7ffc
0x01 7ffb
0x01 0000
0x00 ffff
(32K bytes, 1–5 cycles)
(Device size: 16 bits)
0x00 8000
0x00 7fff
0x00 6000
0x00 5fff
Internal peripheral area 2
(4K bytes, 1 cycle)
0x00 5000
0x00 4fff
0x00 4400
0x00 43ff
Internal peripheral area 1
(1K bytes, 1 cycle)
0x00 4000
0x00 3fff
0x00 0800
0x00 07ff
Internal RAM area
(2K bytes, 1 cycle)
(Device size: 32 bits)
0x00 0000
3-2
reserved
reserved
Flash area
Vector table
reserved
reserved
reserved
Figure 3. 2 S1C17622/602 Memory Map
reserved
reserved
Flash area
Vector table
reserved
reserved
reserved
Figure 3. 3 S1C17621 Memory Map
Seiko epson Corporation
Peripheral function
reserved
0x5400–0x5fff
Display RAM (SEGRAM)
0x53c0–0x53ff
R/F converter (RFC)
0x53a0–0x53bf
A/D converter (ADC10)
0x5380–0x539f
reserved
0x5360–0x537f
IR remote controller (REMC)
0x5340–0x535f
MISC registers (MISC)
0x5320–0x533f
16-bit PWM timer (T16E) Ch.0
0x5300–0x531f
reserved
0x52c0–0x52ff
Port MUX (PMUX)
0x52a0–0x52bf
reserved
0x5280–0x529f
I/O ports (P)
0x5200–0x527f
reserved
0x5140–0x51ff
Power generator (VD1)
0x5120–0x513f
SVD circuit (SVD)
0x5100–0x511f
reserved
0x50e0–0x50ff
8-bit OSC1 timer (T8OSC1)
0x50c0–0x50df
LCD driver (LCD)
0x50a0–0x50bf
Clock generator (CLG)
0x5060–0x509f
Watchdog timer (WDT)
0x5040–0x505f
Stopwatch timer (SWT)
0x5020–0x503f
Clock timer (CT)
0x5000–0x501f
reserved
0x4380–0x43ff
2
I C slave (I2CS)
0x4360–0x437f
I 2 C master (I2CM)
0x4340–0x435f
SPI Ch.0
0x4320–0x433f
Interrupt controller (ITC)
0x42e0–0x431f
8-bit timer (T8F) Ch.1
0x4280–0x42df
16-bit timer (T16) Ch.0–2
0x4220–0x427f
8-bit timer (T8F) Ch.0
0x4200–0x421f
reserved
0x4140–0x41ff
UART Ch.0–1
0x4100–0x413f
reserved
0x4040–0x40ff
MISC registers (MISC)
0x4020–0x403f
reserved
0x4000–0x401f
Peripheral function
reserved
0x5400–0x5fff
Display RAM (SEGRAM)
0x53c0–0x53ff
R/F converter (RFC)
0x53a0–0x53bf
A/D converter (ADC10)
0x5380–0x539f
reserved
0x5360–0x537f
IR remote controller (REMC)
0x5340–0x535f
MISC registers (MISC)
0x5320–0x533f
16-bit PWM timer (T16E) Ch.0
0x5300–0x531f
reserved
0x52c0–0x52ff
Port MUX (PMUX)
0x52a0–0x52bf
reserved
0x5280–0x529f
I/O ports (P)
0x5200–0x527f
reserved
0x5140–0x51ff
Power generator (VD1)
0x5120–0x513f
SVD circuit (SVD)
0x5100–0x511f
reserved
0x50e0–0x50ff
8-bit OSC1 timer (T8OSC1)
0x50c0–0x50df
LCD driver (LCD)
0x50a0–0x50bf
Clock generator (CLG)
0x5060–0x509f
Watchdog timer (WDT)
0x5040–0x505f
Stopwatch timer (SWT)
0x5020–0x503f
Clock timer (CT)
0x5000–0x501f
reserved
0x4380–0x43ff
I 2 C slave (I2CS)
0x4360–0x437f
I 2 C master (I2CM)
0x4340–0x435f
SPI Ch.0
0x4320–0x433f
Interrupt controller (ITC)
0x42e0–0x431f
8-bit timer (T8F) Ch.1
0x4280–0x42df
16-bit timer (T16) Ch.0–2
0x4220–0x427f
8-bit timer (T8F) Ch.0
0x4200–0x421f
reserved
0x4140–0x41ff
UART Ch.0–1
0x4100–0x413f
reserved
0x4040–0x40ff
MISC registers (MISC)
0x4020–0x403f
reserved
0x4000–0x401f
S1C17624/604/622/602/621 TeChniCal Manual
(Device size)
–
(16 bits)
(16 bits)
(16 bits)
–
(16 bits)
(16 bits)
(16 bits)
–
(8 bits)
–
(8 bits)
–
(8 bits)
(8 bits)
–
(8 bits)
(8 bits)
(8 bits)
(8 bits)
(8 bits)
(8 bits)
–
(16 bits)
(16 bits)
(16 bits)
(16 bits)
(16 bits)
(16 bits)
(16 bits)
–
(8 bits)
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(8 bits)
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(Device size)
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(16 bits)
(16 bits)
(16 bits)
–
(16 bits)
(16 bits)
(16 bits)
–
(8 bits)
–
(8 bits)
–
(8 bits)
(8 bits)
–
(8 bits)
(8 bits)
(8 bits)
(8 bits)
(8 bits)
(8 bits)
–
(16 bits)
(16 bits)
(16 bits)
(16 bits)
(16 bits)
(16 bits)
(16 bits)
–
(8 bits)
–
(8 bits)
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