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Each timer channel includes two TOUT output circuits and their signal generation and output can be controlled in-
dividually. Although the output circuit and register names use letters 'A' and 'B' to distinguish two systems, it does
not mean that they correspond to compare A and B signals.
TOuT output pins
Table 13.6.1 lists correspondence between the TOUT pins and the timer channels. The pin function of the cor-
responding ports must be switched for TOUT output in advance. See the "I/O Ports (P)" chapter for switching
the pin function.
TOuT generation mode
TOUTAMD[1:0]/T16A_CCCTLx register (for system A) or TOUTBMD[1:0]/T16A_CCCTLx register (for sys-
tem B) is used to set how the TOUT signal is changed by the compare A and compare B signals.
TOUTAMD[1:0] and TOUTBMD[1:0] are also used to turn the TOUT outputs On and Off.
TOuT signal polarity selection
By default, an active High output signal is generated. This logic can be inverted using TOUTAINV/T16A_
CCCTLx register (for system A) or TOUTBINV/T16A_CCCTLx register (for system B). Writing 1 to
TOUTAINV/TOUTBINV sets the timer to generate an active Low TOUT signal.
Resetting the counter sets the TOUT signal to the inactive level.
Figure 13.6.2 illustrates the TOUT output waveform.
Compare A signal
Compare B signal
(TOUTAMD[1:0] = 0x0, TOUTAINV = 0)
(TOUTAMD[1:0] = 0x0, TOUTAINV = 1)
(TOUTAMD[1:0] = 0x1, TOUTAINV = 0)
(TOUTAMD[1:0] = 0x1, TOUTAINV = 1)
(TOUTAMD[1:0] = 0x2, TOUTAINV = 0)
(TOUTAMD[1:0] = 0x2, TOUTAINV = 1)
(TOUTAMD[1:0] = 0x3, TOUTAINV = 0)
(TOUTAMD[1:0] = 0x3, TOUTAINV = 1)
S1C17624/604/622/602/621 TeChniCal Manual
Table 13.
6.1 List of TOUT Output Pins
Channel
T16A2 Ch.0
T16A2 Ch.1
Table 13.
6.2 TOUT Generation Mode
TOuTaMD[1:0]/
When compare a occurs When compare B occurs
TOuTBMD[1:0]
0x3
0x2
0x1
0x0
Count clock
PRESET
PRUN
Counter value
TOUT(A) output
Figure 13.
6.2 TOUT Output Waveform
Seiko epson Corporation
TOuT output pin
System a
System B
TOUTA5
TOUTB5
TOUTA6
TOUTB6
No change
Toggle
No change
Rise
Disable output
0
1 2 3 4 5 0
1 2 3 4 5 0 1 2 3 4 5 0 1
(When T16A_CCAx = 3, T16A_CCBx = 5)
13 16-BiT PWM TiMeRS (T16a2)
Toggle
Fall
(Default: 0x0)
13-9
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