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D5
CaPBOWie: Capture B Overwrite interrupt enable Bit
Enables or disables capture B overwrite interrupts.
1 (R/W): Interrupt enabled
0 (R/W): Interrupt disabled (default)
Setting CAPBOWIE to 1 enables capture B overwrite interrupt requests to the ITC. Setting it to 0 dis-
ables interrupts.
D4
CaPaOWie: Capture a Overwrite interrupt enable Bit
Enables or disables capture A overwrite interrupts.
1 (R/W): Interrupt enabled
0 (R/W): Interrupt disabled (default)
Setting CAPAOWIE to 1 enables capture A overwrite interrupt requests to the ITC. Setting it to 0 dis-
ables interrupts.
D3
CaPBie: Capture B interrupt enable Bit
Enables or disables capture B interrupts.
1 (R/W): Interrupt enabled
0 (R/W): Interrupt disabled (default)
Setting CAPBIE to 1 enables capture B interrupt requests to the ITC. Setting it to 0 disables interrupts.
D2
CaPaie: Capture a interrupt enable Bit
Enables or disables capture A interrupts.
1 (R/W): Interrupt enabled
0 (R/W): Interrupt disabled (default)
Setting CAPAIE to 1 enables capture A interrupt requests to the ITC. Setting it to 0 disables interrupts.
D1
CBie: Compare B interrupt enable Bit
Enables or disables compare B interrupts.
1 (R/W): Interrupt enabled
0 (R/W): Interrupt disabled (default)
Setting CBIE to 1 enables compare B interrupt requests to the ITC. Setting it to 0 disables interrupts.
D0
Caie: Compare a interrupt enable Bit
Enables or disables compare A interrupts.
1 (R/W): Interrupt enabled
0 (R/W): Interrupt disabled (default)
Setting CAIE to 1 enables compare A interrupt requests to the ITC. Setting it to 0 disables interrupts.
T16a Comparator/Capture Ch.x interrupt Flag Registers (T16a_iFlGx)
Register name address
Bit
T16a
0x540c
D15–6 –
Comparator/
0x542c
D5
Capture Ch.x
(16 bits)
D4
interrupt Flag
D3
Register
D2
(T16a_iFlGx)
D1
D0
D[15:6]
Reserved
D5
CaPBOWiF: Capture B Overwrite interrupt Flag Bit
Indicates whether the cause of capture B overwrite interrupt has occurred or not.
1 (R):
Cause of interrupt has occurred
0 (R):
No cause of interrupt has occurred (default)
1 (W):
Flag is reset
0 (W):
Ignored
S1C17624/604/622/602/621 TeChniCal Manual
name
Function
reserved
CaPBOWiF Capture B overwrite interrupt flag
CaPaOWiF Capture A overwrite interrupt flag
CaPBiF
Capture B interrupt flag
CaPaiF
Capture A interrupt flag
CBiF
Compare B interrupt flag
CaiF
Compare A interrupt flag
Seiko epson Corporation
13 16-BiT PWM TiMeRS (T16a2)
Setting
init. R/W
–
1 Cause of
0 Cause of
interrupt
interrupt not
occurred
occurred
Remarks
–
–
0 when being read.
0
R/W Reset by writing 1.
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
13-19
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