Epson S1C17624 Technical Manual page 350

aPPenDiX a liST OF i/O ReGiSTeRS
0x5069, 0x5420–0x542c
Register name address Bit
T16a Clock 0x5069 D7–4 ClKDiV
Control Register
(8 bits)
Ch.1
(T16a_ClK1)
D3–2 ClKSRC
D1
D0
T16a Counter 0x5420 D15–7 –
Ch.1 Control
(16 bits)
D6
Register
D5–4 CCaBCnT
(T16a_CTl1)
D3
D2
D1
D0
T16a Counter 0x5422 D15–0 T16aTC
Ch.1 Data (16 bits)
Register
(T16a_TC1)
T16a 0x5424 D15–14 CaPBTRG
Comparator/ (16 bits)
Capture Ch.1
Control Register
(T16a_CCCTl1)
D13–12 TOuTBMD
D11–10 –
D9
D8
D7–6 CaPaTRG
D5–4 TOuTaMD
D3–2 –
D1
D0
T16a 0x5426 D15–0 CCa[15:0]
Comparator/ (16 bits)
Capture Ch.1 a
Data Register
(T16a_CCa1)
T16a 0x5428 D15–0 CCB[15:0]
Comparator/
(16 bits)
Capture Ch.1 B
Data Register
(T16a_CCB1)
aP-a-28
16-bit PWM Timer (T16a2) Ch.1 (S1C17624/604)
name Function
Clock division ratio select
[3:0]
Clock source select
[1:0]
– reserved
ClKen
Count clock enable
reserved
hCM
Half clock mode enable
Counter select
[1:0]
CBuFen
Compare buffer enable
TRMD
Count mode select
PReSeT
Counter reset
PRun
Counter run/stop control
Counter data
[15:0] T16ATC15 = MSB
T16ATC0 = LSB
Capture B trigger select
[1:0]
TOUT B mode select
[1:0]
reserved
TOuTBinV TOUT B invert
CCBMD T16A_CCB register mode select
Capture A trigger select
[1:0]
TOUT A mode select
[1:0]
reserved
TOuTainV TOUT A invert
CCaMD
T16A_CCA register mode select
Compare/capture A data
CCA15 = MSB
CCA0 = LSB
Compare/capture B data
CCB15 = MSB
CCB0 = LSB
Seiko epson Corporation
Setting init. R/W
Division ratio 0x0 R/W
CLKDIV[3:0] OSC3 or OSC1
IOSC
0xf – –
1/16384 –
0xe
0xd 1/8192 –
0xc 1/4096 –
1/2048 –
0xb
0xa 1/1024 –
0x9 1/512 –
1/256 1/256
0x8
0x7 1/128 1/128
0x6 1/64 1/64
1/32 1/32
0x5
0x4 1/16 1/16
0x3 1/8 1/8
1/4 1/4
0x2
0x1 1/2 1/2
0x0 1/1 1/1
CLKSRC[1:0] Clock source 0x0 R/W
0x3 External clock
0x2 OSC3
0x1 OSC1
0x0 IOSC
–
1 Enable 0 Disable
–
1 Enable 0 Disable
CCABCNT[1:0] Counter Ch. 0x0 R/W
0x3, 0x2 reserved
0x1 Ch.1
0x0 Ch.0
1 Enable 0 Disable
1 One-shot 0 Repeat
1 Reset 0 Ignored
1 Run 0 Stop
0x0 to 0xffff 0x0
CAPBTRG[1:0] Trigger edge 0x0 R/W
↑ and ↓
0x3
↓
0x2
↑
0x1
0x0 None
TOUTBMD[1:0] Mode 0x0 R/W
cmp B: ↑ or ↓
0x3
cmp A: ↑ or ↓
0x2
cmp A: ↑, B: ↓
0x1
0x0 Off
–
1 Invert 0 Normal
1 Capture 0 Comparator
CAPATRG[1:0] Trigger edge 0x0 R/W
↑ and ↓
0x3
↓
0x2
↑
0x1
0x0 None
TOUTAMD[1:0] Mode 0x0 R/W
cmp B: ↑ or ↓
0x3
cmp A: ↑ or ↓
0x2
cmp A: ↑, B: ↓
0x1
0x0 Off
–
1 Invert 0 Normal
1 Capture 0 Comparator
0x0 to 0xffff 0x0 R/W
0x0 to 0xffff 0x0 R/W
S1C17624/604/622/602/621 TeChniCal Manual
Remarks
– –
0 R/W
– – 0 when being read.
0 R/W
0 R/W
0 R/W
0 W 0 when being read.
0 R/W
R
– – 0 when being read.
0 R/W
0 R/W
– – 0 when being read.
0 R/W
0 R/W