Epson S1C17624 Technical Manual page 65

7 ClOCK GeneRaTOR (ClG)
7.4 System Clock Switching
The figure below shows the system clock selector.
The S1C17624/604/622/602/621 has three system clock sources (IOSC, OSC3, and OSC1) and it start operating
with the IOSC clock after an initial reset. The system clock can be switched to the OSC3 clock when a high-speed
clock is required for the processing, or to the OSC1 clock for power saving. Oscillator circuits other than those
selected as the system clock source and not used for running peripheral circuits can be shut down to reduce current
consumption.
Use HSCLKSEL/OSC_SRC register to select the high-speed clock (HSCLK) from between IOSC and OSC3. Then
select the system clock from between HSCLK and OSC1 using CLKSRC/OSC_SRC register.
The HSCLK selected may be used for some peripheral modules even if OSC1 is used as the system clock.
hSClKSel
1
1
0
0
The following shows system clock switching procedures:
Switching the system clock to OSC3 from iOSC or OSC1
1. Set the OSC3 oscillation stabilization wait time if necessary. (OSC3WT[1:0])
2. Turn the OSC3 oscillator on if it is off. (OSC3EN = 1)
3. Select the OSC3 clock as HSCLK. (HSCLKSEL = 1)
4. Select HSCLK (OSC3 clock) as the system clock. (CLKSRC = 0)
5. Turn the IOSC or OSC1 oscillator off if peripheral modules and FOUT1 output circuit have not used the
IOSC or OSC1 clock.
Switching the system clock to OSC1 from iOSC or OSC3
1. Turn the OSC1 oscillator on. (OSC1EN = 1)
2. Select the OSC1 clock as the system clock. (CLKSRC = 1)
3. Turn the IOSC or OSC3 oscillator off if peripheral modules and FOUTH output circuit have not used the
IOSC or OSC3 clock.
Switching the system clock to iOSC from OSC3 or OSC1
1. Set the IOSC oscillation stabilization wait time if necessary. (IOSCWT[1:0])
2. Turn the IOSC oscillator on if it is off. (IOSCEN = 1)
3. Select the IOSC clock as HSCLK. (HSCLKSEL = 0)
4. Select HSCLK (IOSC clock) as the system clock. (CLKSRC = 0)
5. Turn the OSC3 or OSC1 oscillator off if peripheral modules and FOUTH/1 output circuits have not used
the OSC3 or OSC1 clock.
notes: • Both the IOSC and OSC3 clocks must be active when selecting HSCLK. Otherwise, the sys-
tem will fail to switch HSCLK even when HSCLKSEL is written to, and the HSCLKSEL value
will remain unchanged.
• Both OSC1 and HSCLK must be operating when the system clock is selected (OSC1 or
HSCLK). Otherwise, the system will not switch system clocks, even when CLKSRC is written
to, and the CLKSRC value will remain unchanged.
Furthermore, the system clock switching operation takes a minimum one HSCLK cycle to
maximum one OSC1 cycle.
7-6
HSCLKSEL
IOSC
HSCLK
OSC3
OSC1
Figure 7. 4.1 System Clock Selector
Table 7. 4.1 System Clock Selection
ClKSRC
1
0
1
0
Seiko epson Corporation
CLKSRC
SYSCLK
System clock
hSClK
OSC3
OSC3
IOSC
IOSC
(Default: HSCLKSEL = 0, CLKSRC = 0)
S1C17624/604/622/602/621 TeChniCal Manual
System clock
OSC1
OSC3
OSC1
IOSC